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RUBY - MM - 1612 16 - Channel 12 - Bit Analog Output PC/104 Module User Manual V1.1 Copyright 2001 Diamond Systems Corporation 8430 - D Central Ave. Newark, CA 94560 Tel (510) 456 - 7800 Fax (510) 45 - 7878 techinfo@diamondsystems.com www.dia mondsystems.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 2 TABLE OF CONTENTS 1. DESCRIPTION .......................................................................................................................................... 3 2.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 3 RUBY - MM - 1612 16 - Channel Analog Output PC/104 Module 1. DESCRIPTION Ruby -MM- 1612 is a PC/104 - format data acquisition board that provides analog outputs and digital I/O for process control and other applications.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 4 2. I/O HEADER PINOUT Ruby -MM- 1612 provides a 50 - pin right - angle header labeled J3 for all user I/O. This header is located on the right side of the board. Pins 1, 2, 49, and 50 are marked to aid in proper orientation.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 5 3. BOARD CONFIGURATION Refer to the Drawing of Ruby - MM - 1612 on Page 8 for locations of headers described in Chapters 3 and 4. Base Address Each board in the system must have a diff erent base address.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 6 4. ANALOG OUTPUT RANGE CONFIGURATION Refer to the Drawing of Ruby - MM - 1612 on Page 8 for locations of headers described in Sections 3 and 4. Refer to Figure 4.1 on Page for an expla nation of the voltage reference circuitry.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 7 Table 4.1: Analog Output Configuration (Header J4) Range 5 F A B U 0 - 5V: X X X 0 - 10V: X X +/ - 5V: X X X +/ - 10V: X X 0 - 2.5V: X X X or X X +/ - 2.5V: X X X or X X An X means that a jumper is installed in that location.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 8 5. RUBY - MM - 1612 BOARD DRAWING J1: PC/104 8 - bit bus header J2: PC/104 16 - bit bus header (not used) J3: User I/O heade.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 9 6. I/O MAP Ruby -MM- 1612 occupies 8 consecutive 8 - bit locations in I/O space. For example, the default base address is 300 Hex (768 Decimal); in this case the boar d occupies addresses 300 - 307 (768 - 775).
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 10 7. REGISTER DEFINITIONS Base + 0, Write: DAC LSB register Bit No. 7 6 5 4 3 2 1 0 Name DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 DA7 - 0 D/A data bits 7 - 0. DA0 is the LSB (least significant bit).
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 11 Base + 3, Write: External trigger register Bit No. 7 6 5 4 3 2 1 0 Name X X X X X X X TRIGEN X Bit not used. These bits will be ignored. TRIGEN Ext ernal trigger enable. 1 = enable, 0 = disable.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 12 8. 82C55 DIGITAL I/O CH IP OPERATION This is a short form description of the 82C55 digital I/O chip on the board.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 13 9. ANALOG OUTPUT RANGES AND RESOLUTION The table below lists the available fixed full - scale output ranges and their corresponding actual full - scale voltage ranges and resolution.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 14 10. D/A CODE COMPUTATION Two different methods are used to compute the 12 - bit D/A code used for analog output operat ions. For unipolar output ranges (positive voltages only), straight binary coding is used.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 15 Offset Binary Coding (for bipolar output ranges) This method takes into account the fact that the lowest output voltage is not zero but a negative value.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 16 11. HOW TO GENERATE AN A NALOG OUTPUT This chapter describes how to generate an analog output directly (without the use of the driver software ). Ruby -MM- 1612 has 12 - bit resolution analog outputs.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 17 Examples Single channel output Assume ch annels 0 - 7 are configured for 0 - 5V. To set channel 0 to 3V, do the following: D/A code is 3V / 5V x 4096 = 2458 (value is rounded to nearest integer) LSB = 2458 AND 255 = 154 MSB = (2458 AND 3840) / 256 = 9 Step 1.
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 18 12. CALIBRATION PROCEDUR E Calibration requires a voltmeter (at least 5 digits of precision is preferred) and a miniature screwdriver to turn the potentiometer screws. The common lead of the voltmeter must be connected to analog ground (not digital gr ound).
Copyright 2001 Diamond Systems Corp. Ruby - MM - 1612 User Manual V1.1 P. 19 13. SPECIFICATIONS Analog Outputs No. of outputs 16 voltage outputs Resolution 12 bits (1 part in 40 96) Fixed output ranges 0 - 5V, 0 - 10V unipolar, ± 5V, ± 10V bipolar Adjustable output range Preset to 2.
1 June 1998 82C55A CMOS Pr ogrammable P eripheral Interface Features • Pin Compatible with NMOS 8255A • 24 Programmab le I/O Pins • Fully TTL Compatible • High Speed, No “W ait State” Operation with 5MHz and 8MHz 80C86 and 80C88 • Direct Bit Set/Reset Capability • Enhanced Control W ord Read Capability • L7 Process • 2.
2 Functional Diagram Pin Description SYMBOL PIN NUMBER TYPE DESCRIPTION V CC 26 V CC : The +5V power supply pin. A 0.1 µ F capacitor between pins 26 and 7 is recommended for decoupling. GND 7 GROUND D0-D7 27-34 I/O DATA BUS: The Data Bus lines are bidirectional three-state pins connected to the system data bus.
3 Functional Description Data Bus Buffer This three-state bi-directional 8-bit buff er is used to interf ace the 82C55A to the system data bus . Data is transmitted or received b y the buff er upon ex ecution of input or output instructions by the CPU .
4 P orts A, B, and C The 82C55A contains three 8-bit por ts (A, B, and C). All can be configured to a wide variety of functional characteristics by the system softw are but each has its own special f eatures or “personality” to fur ther enhance the power and fle xibility of the 82C55A.
5 The modes f or P or t A and P or t B can be separately defined, while P or t C is divided into two portions as required by the P or t A and P or t B definitions. All of the output registers, including the status flip-flops, will be reset whene ver the mode is changed.
6 Mode 0 (Basic Input) Mode 0 (Basic Output) Mode 0 Configurations CONTROL WORD #0 CONTROL WORD #2 CONTROL WORD #1 CONTROL WORD #3 tRA tHR tRR tIR tAR tRD tDF RD INPUT CS, A1, A0 D7-D0 tA W tW A tWB .
7 CONTROL WORD #4 CONTROL WORD #8 CONTROL WORD #5 CONTROL WORD #9 CONTROL WORD #6 CONTROL WORD #10 CONTROL WORD #7 CONTROL WORD #11 Mode 0 Configurations (Continued) 1 D7 0 D6 0 D5 0 D4 1 D3 0 D2 0 D.
8 Operating Modes Mode 1 - (Strobed Input/Output). This functional configura- tion provides a means f or transf erring I/O data to or from a specified por t in conjunction with strobes or “hand shaking” signals. In mode 1, port A and por t B use the lines on por t C to generate or accept these “hand shaking” signals.
9 INTR (Interrupt Request) A “high” on this output can be used to interrupt the CPU when and input de vice is requesting ser vice. INTR is set b y the condition: STB is a “one”, IBF is a “one” and INTE is a “one”. It is reset by the f alling edge of RD .
10 Operating Modes Mode 2 (Strobed Bi-Directional Bus I/O) The functional configuration provides a means f or communi- cating with a peripheral device or structure on a single 8-bit bus f or both transmitting and receiving data (bi-directional bus I/O).
11 FIGURE 11. MODE CONTROL WORD FIGURE 12. MODE 2 NO TE: Any sequence where WR occurs before A CK and STB occurs before RD is permissible. (INTR = IBF • MASK • STB • RD ÷ OBF • MASK • ACK • WR) FIGURE 13.
12 MODE 2 AND MODE 0 (INPUT) MODE 2 AND MODE 0 (OUTPUT) MODE 2 AND MODE 1 (OUTPUT) MODE 2 AND MODE 1 (INPUT) FIGURE 14. MODE 2 COMBINA TIONS 1 D7 1 D6 D5 D4 D3 D2 D1 D0 CONTROL W ORD PC7 8 STBA P A7-P.
13 Special Mode Combination Considerations There are se veral combinations of modes possib le. F or any combination, some or all of P or t C lines are used f or control or status. The remaining bits are either inputs or outputs as defined by a “Set Mode” command.
14 Reading P ort C Status (Figures 15 and 16) In Mode 0, P or t C transf ers data to or from the peripheral de vice. When the 82C55A is programmed to function in Modes 1 or 2, P or t C generates or accepts “hand shaking” signals with the peripheral device .
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