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Reference Number: 329187-001 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet - Volume One of Two September 2013.
2 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONN ECTION WITH Intel® PRODUCTS. NO LICENSE, Express* OR IMPLIED, BY ESTOPPEL OR OT HERWISE, TO ANY INT ELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 3 Datasheet Volume One of Two Table of Contents 1O v e r v i e w .......... ........... ............ ............. .......... ............. ............. .......... ............. ........
4 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 3.2.3 AES Instructions ........... ............. ............. ............ ............. ............. ..........80 3.2.4 Execute Disabl e Bit .............
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 5 Datasheet Volume One of Two 6.9 Processor Asynchronous Sideband and Miscellane ous Signals ........... ............. ........ 122 6.10 Processor Power and Groun d Supplies ... .........
6 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 10.3 Fan Power Supply [STS 200C] ... ............... ............... .. .. ............... .. ................. ..... 228 10.3.1 Boxed Processor Cooling Requirements .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 7 Datasheet Volume One of Two 2-42 Processor ID Construction Example ......... ...... ... .......... ............. ............ ........... ...... 60 2-43 RdIAMSR() ............... ......
8 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 1-3 Refer e nce d Docum ents ....... .. ........... .. .. .. ........... .. .. .. ............. .......... .. .. .. ............. .. 22 2-1 Summary of Processor-specific PECI Commands .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 9 Datasheet Volume One of Two 6-11 System Reference Clock (BCLK{0/1}) Signals ..... .......... ........... ............ ........... .... 121 6-12 JTAG and TA P Sig nals .......... .. ... .
10 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Revision History § Revision Number Descript ion Revisi on Dat e 001 • Initial Rel ease September 2013.
Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 11 Datasheet Volume One of Two 1 Overview 1.1 Introduction The Intel® X eon® processor E5-1600 v2/E5-2600 v2 product families.
Overview 12 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Some processor features are not available on all platforms. R efer to the Intel® Xeon® Processor E5 v2 Product Family Specification Update for de t ai l s o f e ac h pr o ce ss or S KU .
Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 13 Datasheet Volume One of Two • Configuratio n Process and Regis ters • Processor Integr ated I/O (IIO) Configur ation R egisters • Processor Uncore Co nfiguration R egisters Figure 1-1.
Overview 14 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 1.1.1 Processor Feature Details • Up to 12 execution cores • Each core supports two threads .
Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 15 Datasheet Volume One of Two • Independent channel mode or lockstep mode • Data burst length of eight cycles for all memo.
Overview 16 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two • Memory thermal monitoring support for DIMM temperature via two memory signals, MEM_HOT_C{01/23}_N 1.2.2 PCI Express* • The PCI Express* port(s) are fully-compliant to the PCI Express* Base Specification, Revision 3.
Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 17 Datasheet Volume One of Two • Power Management Event (PME ) functions. • Message Signaled Interrupt (MSI and MS I- X) messages • Degraded Mode support and Lane Reversal support • Static lane numbering reversal and polarity inversion support • Support for PCIe* 3.
Overview 18 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two • Static lane numbering reversal support • Sup ports DM I2 virtual channels VC0, VC1, VCm, and VC p 1.2.4 Intel® QuickPath Interconnect (Intel® QPI) • Compliant with Intel QuickPath Interconnect v1.
Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 19 Datasheet Volume One of Two 1.3 Power Management Support 1.3.1 Processor Package and Core States • ACPI C-states as implem.
Overview 20 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 1.6 Terminology Term Description ASPM Active State Power Man a gement BMC Baseboard Management Controllers Cb o Ca c h e a n d C o r e B o x . I t i s a t e r m u s e d for internal logic pr ov iding ring interface to LLC and Core.
Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 21 Datasheet Volume One of Two Intel® Xeon® proce ss or E5-1600 v2 product family Intel’s 22-nm processor de sign, is the follow-on to the 3rd Generation Intel® Core™ Processo r F amily design.
Overview 22 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 1.7 Related Documents Refer to the following documents for additional information. SKU A processor Stock K eeping Unit (SKU) to be installed in either server or workstation platforms.
Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 23 Datasheet Volume One of Two 1.8 Statement of Volatility (SOV) Intel® Xeon® processor E5-1600 v2/E5-2600 v2 product families do not retain any end-user data when powered down and/or the processor is physically removed from the socket.
Overview 24 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 25 Datasheet Volume One of Two Interfaces 2 Interfaces This chapter describes the interfac es supported by the processor .
Interfaces 26 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.2 PCI Express* Interface This section describes the PCI Express* 3.0 interface capabilities of the processor . See the PCI Express* Base Specific ation for details of PCI Express* 3.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 27 Datasheet Volume One of Two Interfaces 2.2.1.1 Transaction Layer The upper layer of the PCI Express* architecture is the T ransaction Layer . The T ransaction Lay er's primary responsibilit y is the assembly and disassembly of T ransaction Lay er Packets (TLPs).
Interfaces 28 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two PCI Express* extends the configuration space to 4096 bytes per-device/function, as compared to 256 bytes allowed by the Conventional PCI Specification .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 29 Datasheet Volume One of Two Interfaces The Intel® QuickP ath Interconnect has an efficient architecture allowing more interconnect performance to be achiev ed in real systems.
Interfaces 30 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Generic PECI specification details are out of the scope of this document.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 31 Datasheet Volume One of Two Interfaces PECI permits writes to certain Memory Controller RA S-related registers in the processor PCI configuration space. Details are covered in Section 2.
Interfaces 32 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Read Length: 0x08 Command: 0xf7 2.5.2.2.2 D evice Info The Device Info byte gives details regarding the PECI client configuration.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 33 Datasheet Volume One of Two Interfaces For the processor PECI client, the R evision Number it returns will be ‘0011 0100b’ . 2.5.2.3 G etTemp() The GetT emp() command is used to retriev e the die temperature from a target PECI address.
Interfaces 34 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Command: 0x01 Description : R eturns the highest die temperature for addressed proces sor PECI client. Example bus transaction for a thermal sensor device located at address 0x30 returning a value of negative 10 counts is show in Figure 2-9 .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 35 Datasheet Volume One of Two Interfaces 2.5.2.4.1 Command Format The RdPkgConfig() format is as follows : Write Len gth: 0x05 Read Len.
Interfaces 36 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.5 WrPkgConfig() The W rPkgConfig() command pr ovides write access to the package con figuration space (PCS) within the processo r , including various power and thermal management functions.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 37 Datasheet Volume One of Two Interfaces Note: The 2-byte p arameter field and 4-byte write da ta field defined in Figure 2-11 are sent in standard PECI ordering with LSB first a nd MS B last.
Interfaces 38 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.1 DRAM Thermal and Power Optimiz ation Capabilities DRAM thermal and power optimizatio.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 39 Datasheet Volume One of Two Interfaces Notes: 1. Time, energy and powe r units should be assumed, where applicable, to be bas ed on values return ed by a read of the PACKAGE_POWER_S KU_UNIT MSR or through the P ackage Powe r SKU Unit PCS read service.
Interfaces 40 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.2 DRAM Ther mal Estimation C o nfiguration Data Read/Write This feature is relevant only when acti vity-based DRAM temper ature estimation methods are being utilized and would appl y to all the DIMMs on all the memory channels.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 41 Datasheet Volume One of Two Interfaces 2.5.2.6.4 DIMM Temperature Read This feature allows the PECI host to read the temperature of all the DIMMs within a channel up to a maximum of th ree DIMMs.
Interfaces 42 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.6 D RAM Channel Temperat ure Read This feature enables a PECI host read of the maximum temperature of each channel. This would include all the DIMMs within the ch annel and all the ranks within each of the DIMMs.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 43 Datasheet Volume One of Two Interfaces 2.5.2.6.8 DRAM Power Info Read This read returns the minimum, typical and maximum DRAM power s.
Interfaces 44 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.9 DRAM Power Limit Data Write/Read This feature allows the PECI host to progra m the power limit over a specified time or control window for the entire DRAM domain covering all the DIMMs within all the memory channels.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 45 Datasheet Volume One of Two Interfaces 2.5.2.6.10 DRAM Power Limit Pe rformance Status Read This service allows the PECI host to assess the performance impact of the currently active DRAM power limiting modes.
Interfaces 46 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Table 2-8. RdPkgConfig() & WrPkgConfig( ) CPU Thermal and Power Opti mization Services Sum.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 47 Datasheet Volume One of Two Interfaces Per C or e DTS Te m p e r a t u r e Rea d 09 0x0000- 0x0007 (cores 0-7) 0x00FF - Syst em Agent.
Interfaces 48 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.12 Package Identifier Read This feature enables the PECI ho st to uniquel y identify the PECI client processor .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 49 Datasheet Volume One of Two Interfaces • CPUID data : This is the equivalent of data that can be accessed through the CPUID instruction execution. It contains processor type, stepping, model and family ID information as shown in Figure 2-21 .
Interfaces 50 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two • CPU Microcode Update Revision : R eflects the revision number for the microcode update and power control unit firmw are updates on the processor sample.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 51 Datasheet Volume One of Two Interfaces 2.5.2.6.14 Package Power SKU Read This read allows the PECI host to access the minimum, Thermal Design P ower and maximum power settings for the processor package SKU.
Interfaces 52 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two negotiated PECI bit rate. A ‘reset’ or ‘clear ’ of this bit or simply not setting the .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 53 Datasheet Volume One of Two Interfaces 2.5.2.6.19 Temperature Targe t Read The T emperature T arget Read allows the PECI host to obtain the target D TS temperature (T Prochot ) for PROCHO T_N assertion in degrees Cels ius.
Interfaces 54 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.21 Thermal Avera ging Constant Write/Re ad This feature allows the PECI host to co ntrol the window over which the estimated processor PECI temperature is filtered.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 55 Datasheet Volume One of Two Interfaces While Intel requires reading the accumulate d energy data at least onc e ev e ry 16 seconds to ensure functional correctness, a more realistic polling rate recommendation is once every 100mS for better accur acy .
Interfaces 56 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The same conversion formula used for DRAM P owe r Limiting (see Section 2.5.2.6.9 ) should be applied for encoding or progra mming the ‘Control Time Window’ in bits [23:17].
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 57 Datasheet Volume One of Two Interfaces 2.5.2.6.27 Package Power Limi t Pe rformance Status Read This service allows the PECI host to assess the performance impact of the currently active power limiting modes.
Interfaces 58 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.29 ACPI P-T Notify Wri te & Read This feature enables the processor turbo capa bility when used in conjunction with the PECI package RAPL or power limit.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 59 Datasheet Volume One of Two Interfaces Bit[11] is the Read Mode bit and should be set to ‘0’ for TOR reads.
Interfaces 60 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Description : R eturns the data maintained in the processor IA MSR space as specified by the ‘Processor ID’ and ‘MSR Address’ fields. The R ead Length dictates the desired data return size.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 61 Datasheet Volume One of Two Interfaces Note: The 2-byte MSR Addres s field and read data field de fined in Figure 2-43 are sent in standard PECI ordering with LSB first a nd MS B last.
Interfaces 62 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two PECI access to these registers is expected only when in-band access mechanisms are not av ailable. Notes: 1. The MCi_ADDR and MCi_MIS C registers for machine check banks 2 & 4 are no t implemented on the pr ocessors.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 63 Datasheet Volume One of Two Interfaces 2. The PECI host must determine the total number of machine check banks and the v alidity of t.
Interfaces 64 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Note: The 4-byte P CI c onfiguration address a n d read data field d efined in Figure 2-45 are sent in standard PECI or dering with LSB first and MSB last.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 65 Datasheet Volume One of Two Interfaces completion code. Alternatively , reads to un implemented or hidden registers may return a completion code of 0x90 indicating an inv alid request.
Interfaces 66 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.9.2 S upp o rte d Response s The typical client response is a passing FCS, a passing Completion Code and valid data. Under some conditions, the client’s response will indicate a failure.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 67 Datasheet Volume One of Two Interfaces AW FCS Support: Ye s Description : W rites the data sent to the reques ted register address. Write Length dictates the desired write granularity .
Interfaces 68 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.10.3 WrPCIConfigLocal () Capabiliti es On the processor PECI clients, the PECI W rPCIConfigLocal() command provides a method for programming certain in tegrated m emory controller and IIO functions as described in T able 2-15 .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 69 Datasheet Volume One of Two Interfaces In the event that the processor is tri-stated using power -on-configur ation controls, the PECI client will also be tri-stated. Processor tri-state controls are described in Section 7.
Interfaces 70 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two to a different PECI addresses. Strapping the SOCK ET_ID[1:0] pins results in the client addresses shown in T able 2-17 . These package strap(s) are evaluated at the assertion of PWRGOOD (as depicted in Figure 2-49 ).
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 71 Datasheet Volume One of Two Interfaces 2.5.3.5 S-st ates The processor PECI client is always guar anteed to b e operational in the S0 sleep state.
Interfaces 72 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.3.7.1 BMC INIT Mode The BMC INIT b oot mode is used to provid e a quick and efficient means to transfer responsibility for uncore configur ation to a service processor like the BMC.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 73 Datasheet Volume One of Two Interfaces The processor PECI client will not clear the semaphore that was acquired to service the request until the originator sends the ‘retry’ re quest in a timely fashion to successfully retrieve the response data.
Interfaces 74 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.5 Client Responses 2.5.5.1 Abort FCS The Client responds with an Abort FCS under the follo.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 75 Datasheet Volume One of Two Interfaces Note: The codes explicitly defined in Ta b l e 2-22 may be useful in PECI originator response algorithms.
Interfaces 76 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.7.2 Interpretation The resolution of the processor’ s Digital Th ermal Sensor (D TS) is approximately 1°C, which can be confirmed by a RDMSR from the IA32_THERM_ST A TUS MSR where it is architecturally defined.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 77 Datasheet Volume One of Two Technologies 3 Technologies 3.1 Intel® Virtualization Technology (Intel® VT) Intel® Virtualization T echnology (Intel® VT ) makes a single system appear as multiple independent systems to software.
Technologies 78 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 3.1.2 Intel® VT-x Features The processor core supports th e following Intel VT -x features:.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 79 Datasheet Volume One of Two Technologies partitions in the same operating system , or there can be multiple oper ating system instances running on the same system – offering benefits such as system consolidation, legacy migration, activity partitioning or security .
Technologies 80 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The Intel TXT platform helps to provide the authenticit y o f the controlling en v ironment such that those wishing to rely on the platform can make an appropriate tru st decision.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 81 Datasheet Volume One of Two Technologies The architecture consists of six instructions that offer full hardw are support for AES. Fo ur instructions support the AES encryption and decryption, and the other two instructions support the AES key expansion.
Technologies 82 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two For more information on Intel Hyper- Threading T echnology , see http://www .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 83 Datasheet Volume One of Two Technologies 3.8 Intel® Intelligent Power Technology Intel® Intelligent P ower T echnology conserves power while delivering advanced power- management capabilities at the r ack, group, and data center level.
Technologies 84 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two • Extensibility - Intel AVX has built -in extensibility for the future vector extensions: — OS context management for v ector-widths beyond 256 bits is streamlined.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 85 Datasheet Volume One of Two Power Management 4 Power Management This chapter provides information on the following power management t.
Power Management 86 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. Processor Core and P ackage C7 is not supporte d. 2. All package states are d efined to be “E” states - such th at they always exit back into the LFM point upon executi on resume 3.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 87 Datasheet Volume One of Two Power Management 4.1.4 DMI2/PCI Express* Link States Note: L1 is o n ly supported w hen the DM I2/ PCI Express* po rt is operating a s a P CI Express * po rt.
Power Management 88 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 4.2 Processor Core/Package Power Management While executin g co de, Enhan ced Intel SpeedStep® T echnolog y optimizes the processor’s frequency and core voltage base d on workload.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 89 Datasheet Volume One of Two Power Management While individual threads can request low power C -states, power saving actions only take place once the core C -state is resolved . Core C -states are automatically resolved by the processor .
Power Management 90 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two from the ACPI-defined processor clock con t rol registers, referred to as P_L VLx. This method of requesting C -states provides legacy support for oper ating systems that initiate C-state transitions via I/O reads.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 91 Datasheet Volume One of Two Power Management A System Management Interrupt (SMI) handler returns execution to either Norm al state or the C1/C1E state.
Power Management 92 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two — The platform may allow additional po wer savings to be realized in the processor . • For package C -states, the processor is not required to enter C0 before entering any other C-state.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 93 Datasheet Volume One of Two Power Management 4.2.5.1 Package C0 The normal operating state for the processor .
Power Management 94 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 4.2.5.3 Packa ge C2 State Package C2 state is an intermediate state which represents the point at which the system level coordination is in progress.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 95 Datasheet Volume One of Two Power Management 4.2.6 Package C-State Power Specifications The table below lists the processor package C -state power specifications for v arious processor SKUs.
Power Management 96 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 4.3 System Memory Power Management The DDR3 power states can be summarized as the following: • Normal operation (highest power consumption).
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 97 Datasheet Volume One of Two Power Management • Precharge power-down slow exit: In this mode the data-in DLL ’ s on DDR are off . Existing this mode is 3 - 5 DCLK cycles until the first co mmand is allowed, but about 16 cycles until first data is allowed.
Power Management 98 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The I/O buffer for an unused signal should be tristated (output driver disabled), the input receiver (differential sense-amp) shou ld be disabled.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 99 Datasheet Volume One of Two Thermal Management Specifications 5 Thermal Management Specifications 5.1 Package Thermal Specifications The processor requires a thermal solution to maintain temper atures within operating limits.
Thermal Management Specifications 100 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The temperature reported over PECI is alw a ys a negative v alue and r.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 101 Datasheet Volume One of Two Thermal Management Specifications 5.1.2 T CASE and DTS Based Therma l Specifications T o simplify compliance to thermal specifications at processor run time, the processor has added a Digital Thermal Sensor (DTS) b ased thermal specification.
Thermal Management Specifications 102 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 5.1.3 Processor Operation al Thermal Specifications Each SKU has a unique thermal profile that ensures reliable operation for the intended form factor over the processor’ s service lif e.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 103 Datasheet Volume One of Two Thermal Management Specifications Table 5-1. T Case Temperature Thermal Specifications TDP (W) Model Number Core Count T LA (°C) PSI CA (°C/W) Minimum T CASE (°C) Maximum T CASE (°C) 150W WS E5-2687W v2 8 39.
Thermal Management Specifications 104 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 5.1.3.3 Digital Thermal Sensor (DTS) thermal profiles Each D TS thermal profile is unique to each TDP and core count combination.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 105 Datasheet Volume One of Two Thermal Management Specifications 130W 2U E5-2687W v2 E5-2667 v2 8 49.8 0.317 91.0 E5-2643 v2 6 49.8 0.359 96.5 E5-2637 v2 4 50.1 0.422 105.0 130W 1S E5-1660 v2 E5-1650 v2 6 42.
Thermal Management Specifications 106 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 5.1.4 Embedded Server Thermal Profiles Network Equipment Building System (NEBS) is the most common set of environm ental design guidelines applied to telecommuni cations equipment in the United States.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 107 Datasheet Volume One of Two Thermal Management Specifications P ower specifications are defined at all VID values found in Ta b l e 7 - 3 . The processor may be d elivered under multiple VIDs for each freque ncy .
Thermal Management Specifications 108 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 5.1.4.2 Embedded Dig ital T hermal Sensor (DTS) thermal profiles The thermal solution is expected to be de veloped in accordance with the T case thermal profile.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 109 Datasheet Volume One of Two Thermal Management Specifications up to T control is permitted at all power levels. Compliance to the D TS profile is required for any temperatu res exceeding T control.
Thermal Management Specifications 110 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. Figure is not to scale and is for reference only . 2. This is an example for package size 52.5 x 45 mm. 3. B1: Max = 52.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 111 Datasheet Volume One of Two Thermal Management Specifications reduced frequency and voltage results in a reduction to the processor power consumption.
Thermal Management Specifications 112 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two SVID/frequency points. T ransition of the SVID code will occur first, to insure proper operation once the processor reaches its normal oper ating frequency .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 113 Datasheet Volume One of Two Thermal Management Specifications Demand mode, the duty cycle of the clock mo dulation is programmable via bits 3:0 of the same IA32_CLOCK_MODULA TION MSR.
Thermal Management Specifications 114 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two asserted, all processor supplies (VCC, VTT A , VT TD, VSA, VCCPLL, VCCD) must be removed within the timefr ame provided.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 115 Datasheet Volume One of Two Thermal Management Specifications to zero, then the processor ignores all external assertions of MEM_HO T_{C01/C23}_N signals (in effect they become outputs).
Thermal Management Specifications 116 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 117 Datasheet Volume One of Two Signal Descriptions 6 Signal Descriptions This chapter describes the processor signals. They are arr anged in functional groups according to their associated interface or category .
Signal Descriptions 118 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 6.2 PCI Express* Based Interface Signals Note: PCI Express* P orts 1, 2 and 3 Signals are receiv e and transmit differential pairs. Table 6-2.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 119 Datasheet Volume One of Two Signal Descriptions PE2D_RX_DN[15:12] PE2D_RX_DP[15:12] PCIe Receiv e Data Input PE2A_TX_DN[3:0] PE2A_TX.
Signal Descriptions 120 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 6.3 DMI2/PCI Express* Port 0 Signals 6.4 Intel® QuickPath Interconnect Signals PEHPSDA PCI Express* Hot-Plug SMBus Da ta: Provides PCI Express* hot- plug support via a de dicated SMBus inter face.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 121 Datasheet Volume One of Two Signal Descriptions 6.5 PECI Signal 6.6 System Reference Clock Signals 6.
Signal Descriptions 122 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 6.8 Serial VID Interface (SVID) Signals 6.9 Processor Asynchronous Sideband and Miscellaneous Signals Table 6-13. SVID Signals SVIDALER T_N Serial VID alert.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 123 Datasheet Volume One of Two Signal Descriptions MEM_HOT_C01_N MEM_HOT_C23_N Memory throttle control. MEM_HO T_C01_N and MEM_HO T_C23_N signals h ave two m odes of operation – input a nd out put mod e.
Signal Descriptions 124 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two SOCKET_ID[1:0] Socket ID Str ap. Socket id entification configuration straps for establishing the PECI address, Intel® QPI Node ID, and other settings.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 125 Datasheet Volume One of Two Signal Descriptions 6.10 Processor Power and Ground Supplies Table 6-15.
Signal Descriptions 126 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two § VSA V ariable power supply for th e processor s ystem agent uni ts.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 127 Datasheet Volume One of Two Electrical Specifications 7 Electrical Specifications 7.1 Processor Signaling The processor includes 2011 lands, which us e v arious signaling technologies.
Electrical Specifications 128 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.1.5 Platform Environmenta l Control Interface (PECI) PECI is an Intel propri.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 129 Datasheet Volume One of Two Electrical Specifications Clock multiplying within the processor is provided by the internal phase locked loop (PLL), which requires a constant frequenc y BCLK{0/1}_DP , BCLK{0/1}_ DN input, with exceptions for spread spectrum clocking.
Electrical Specifications 130 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.1.9.2 Decoupling Guidelines Due to its large number of transistors and hi gh internal clock speeds, the processor is capable of generating large current swings between low and full power states.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 131 Datasheet Volume One of Two Electrical Specifications • SetVID_fast (10 mV/µs for V SA /V CCD ), •S e t V I D _ s l o w ( 2 .
Electrical Specifications 132 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The VR may change its configuration to meet the processor’ s power needs with greater efficiency .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 133 Datasheet Volume One of Two Electrical Specifications Notes: 1. Check with VR vendors for determ ining t he physical addr ess assignment method for their controllers. 2. VR addressing is assign ed on a per voltage r ail basis.
Electrical Specifications 134 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. 00h = Off State 2. VID Range HEX 01-32 are not used by the processor . 3. For VID Ranges supported s ee Ta b l e 7 - 1 1 .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 135 Datasheet Volume One of Two Electrical Specifications PCI Express* PC I Express* interfac e s ignals. These sign als are compatible with PCI Express 3.0 Signalling Environment AC Specifications and are AC coupled.
Electrical Specifications 136 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Differential PCI Express* Output PE1A_TX_D[N/P][3:0] PE1B_TX_D[N/P][7:4] PE2A_.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 137 Datasheet Volume One of Two Electrical Specifications Notes: 1. Refer to T able 7-19 for details on the R ON (Buffer on R esistance) value for this signal. Processor Asynchronous Sideband Signals Single ended CMOS1.
Electrical Specifications 138 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.3 Power-On Configuration (POC) Options Several con figuration options can be config ured by hardw are.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 139 Datasheet Volume One of Two Electrical Specifications 7.5 Mixing Processors Intel supports and v alidates two and four processor con.
Electrical Specifications 140 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.6 Flexible Motherboard Guidelines (FMB) The Flexible Motherboard (FMB) guidelines are estimates of the maximum values the processor will hav e over certain time periods.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 141 Datasheet Volume One of Two Electrical Specifications device storage conditions for a sustained period of tim e. At conditions outside sustained limits, but within absolute maximum and minimum r atings, quality & reliability ma y be affected.
Electrical Specifications 142 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. Unless otherwise noted, all specifications in this table apply to all processors. Th es e specificatio ns are based on final si l icon characterizati on.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 143 Datasheet Volume One of Two Electrical Specifications Notes: 1. Unless otherwise noted, all specifications in this table apply to a ll processors. These specificat io ns are base d on final si l icon characterization.
Electrical Specifications 144 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. The loadline specificat ion includes both stat ic and transient limits. 2. This table is intended to aid in reading discrete points on graph in Figu re 7-3 .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 145 Datasheet Volume One of Two Electrical Specifications and VSS_VC C_SENSE lands. R efer to the co mpatibl e VR12.0 PWM controller for lo adline guidelin es and VR implementation details.
Electrical Specifications 146 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.8.2 Die Voltage Validation Core voltage (V CC ) ov ershoot events at the processor must meet the specifications in Ta b l e 7 - 1 4 when measured across the VCC_SE NSE and VS S_VCC_SENSE land s.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 147 Datasheet Volume One of Two Electrical Specifications Notes: 1. V OS_MAX is the measured overshoot voltage. 2. T OS_MAX is the measured time dur ation above VccMAX(I1). 3. Istep: Load Release Current Step, for example, I2 to I1, where I2 > I1.
Electrical Specifications 148 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. Unless otherwise noted, all spec ifications in this table appl y to all processor frequencies. 2. The voltage rail V CCD which will be set to 1.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 149 Datasheet Volume One of Two Electrical Specifications 11. DRAM_PWR_OK_C{01/23} must have a maximum of 30 ns rise or fall time over VCCD * 0.55 +300 mV and -200 mV and the edge must be monotonic.
Electrical Specifications 150 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 8. For Vin between 0 and Vih. Note: 1. These signals are measur ed between VIL and VIH. 2. The signal edge rate must be met or the signal must tr ansition monotonically to the asserted state.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 151 Datasheet Volume One of Two Electrical Specifications Notes: 1. V TT refers to instantaneous V TT . 2. Measured at 0.31*V TT 3. Vin between 0V and V TT 4. These are measured b etwe en VIL and VIH.
Electrical Specifications 152 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. IVT_ID_N land is pulled to ground on the package. 7.8.3.1 PCI Express* DC Specifications The processor DC specifications for the PCI Express* are available in the PCI Express Base Specification - Revision 3.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 153 Datasheet Volume One of Two Electrical Specifications Figure 7-6. BCLK{0/1} Differential Clock Crosspoint Specification Figure 7-7. BCLK{0/1} Differential Cl ock Measurement Point for Ringback Figure 7-8.
Electrical Specifications 154 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.9 Signal Quality Data transfer requires the clean reception of data signals and clock signals.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 155 Datasheet Volume One of Two Electrical Specifications 7.9.5 Overshoot/Undershoot Tolerance Overshoot (or undershoot) is the absolute value of th e maximum voltage abov e or below V SS, s ee Figure 7-9 .
Electrical Specifications 156 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The specification provided in the table show s the maxi mum pulse duration allowed for a given ov ershoot/undershoot magnitude at a spec ific activity factor .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 157 Datasheet Volume One of Two Electrical Specifications § Table 7-24. Processor Sideband Signal Group Overshoot/Un dershoot Tolerance Absolute Maximum Overshoot (V) Absolute Maximum Undershoot (V) Pulse Duration (ns) AF=0.
Electrical Specifications 158 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 159 Datasheet Volume One of Two Processor Land Listing 8 Processor Land Listing This chapter provides sorted land list in Section 8.1 and Section 8.2 . Ta b l e 8 - 1 is a listing of all processor lands orde red alphabetically by land name.
Processor Land Listing 160 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two DDR0_DQ[10] CH4 SSTL I/O DDR0_DQ[11] CJ5 SSTL I/O DDR0_DQ[12] CA1 SSTL I/O DDR0_D.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 161 Datasheet Volume One of Two Processor Land Listing DDR0_DQS_DP[12] CB10 SSTL I/O DDR0_DQS_DP[13] CD32 SSTL I/O DDR0_DQS_DP[14] CK32 .
Processor Land Listing 162 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two DDR1_DQ[13] DB6 SSTL I/O DDR1_DQ[14] DB10 SSTL I/O DDR1_DQ[15] D F10 SSTL I/O DDR.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 163 Datasheet Volume One of Two Processor Land Listing DDR1_DQS_DP[15] CP38 SSTL I/O DDR1_DQS_DP[16] DB38 SSTL I/O DDR1_DQS_DP[17] CY14 .
Processor Land Listing 164 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two DDR2_DQ[19] U29 SSTL I/O DDR2_DQ[20] T34 SSTL I/O DDR2_DQ[21] P34 SSTL I/O DDR2_D.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 165 Datasheet Volume One of Two Processor Land Listing DDR2_ECC[3] AB26 SSTL I/O DDR2_ECC[4] AB30 SSTL I/O DDR2_ECC[5] AD30 S STL I/O DD.
Processor Land Listing 166 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two DDR3_DQ[22] A33 S STL I/O DDR3_DQ[23] B32 S STL I/O DDR3_DQ[24] M32 SSTL I/O DDR3.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 167 Datasheet Volume One of Two Processor Land Listing DDR3_ECC[6] F26 SSTL I/O DDR3_ECC[7] H26 SSTL I/O DDR3_MA_PAR B18 SSTL O DDR3_MA[.
Processor Land Listing 168 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two PE1B_TX_DN[5] L47 PCIEX3 O PE1B_TX_DN[6] K48 PCIEX3 O PE1B_TX_DN[7] L49 PCIEX3 O .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 169 Datasheet Volume One of Two Processor Land Listing PE3A_TX_DP[1] J51 PCIEX3 O PE3A_TX_DP[2] R47 PCIEX3 O PE3A_TX_DP[3] P48 PCIEX3 O .
Processor Land Listing 170 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two QPI0_DRX_DN[18] BN49 QPI I QPI0_DRX_DN[19] BM48 QPI I QPI0_DRX_DP[00] BG51 QPI I .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 171 Datasheet Volume One of Two Processor Land Listing QPI1_DRX_DN[18] CM46 QPI I QPI1_DRX_DN[19] CN45 QPI I QPI1_ DRX_DP[ 00] CC55 QPI .
Processor Land Listing 172 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two RSVD BH44 RSVD BH46 RSVD BJ43 RSVD BJ45 RSVD BK44 RSVD BL43 RSVD BL45 RSVD BM44 R.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 173 Datasheet Volume One of Two Processor Land Listing VCC AM10 PWR VCC AM12 PWR VCC AM14 PWR VCC AM16 PWR VCC AM2 P WR VCC AM4 P WR VCC.
Processor Land Listing 174 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two VCC BE9 PWR VCC BF10 PWR VCC BF12 PWR VCC BF14 PWR VCC BF16 PWR VCC BF2 PWR VCC B.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 175 Datasheet Volume One of Two Processor Land Listing VCC B U7 PWR VCC B U9 PWR VCC BV 10 PWR VCC BV 12 PWR VCC BV 14 PWR VCC BV 16 PWR.
Processor Land Listing 176 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two VSA AH16 PWR VSA AH2 PWR VSA AH4 PWR VSA AH6 PWR VSA AH8 PWR VSA AJ1 PWR VSA AJ11.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 177 Datasheet Volume One of Two Processor Land Listing VSS AK4 GND VSS AK42 GND VSS AK44 GND VSS AK46 GND VSS AK48 GND VSS AK50 GND VSS .
Processor Land Listing 178 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two VSS BF44 GND VSS BG47 GND VSS BH58 GND VSS BJ55 GND VSS BJ57 GND VSS BK42 GND VSS.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 179 Datasheet Volume One of Two Processor Land Listing VSS CC 29 GND VSS CC3 GND VSS CC 43 GND VSS CC 47 GND VSS CC 49 GND VSS CC9 GND V.
Processor Land Listing 180 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two VSS CN9 GND VSS CP12 GND VSS CP16 GND VSS CP36 GND VSS CP40 GND VSS CP42 GND VSS .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 181 Datasheet Volume One of Two Processor Land Listing VSS DD36 GND VSS DD38 GND VSS DD6 GND VSS DE 17 GND VSS DE 41 GND VSS DE 53 GND V.
Processor Land Listing 182 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two VSS N49 GND VSS N5 GND VSS N53 GND VSS N9 GND VSS P10 G ND VSS P12 G ND VSS P14 G.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 183 Datasheet Volume One of Two Processor Land Listing 8.2 Listing by Land Number VTTD A T42 PWR VTTD A Y42 PWR VTTD BD42 P WR VTTD BH42 PWR VTTD BK56 P WR VTTD BL51 PWR VTTD BM42 PWR VTTD BR55 PW R Table 8-1.
Processor Land Listing 184 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two AB26 DDR2_ECC[3] SSTL I/O AB28 DDR2_DQS_DN[08] SSTL I/O AB30 DDR2_ECC[4] SSTL I/O.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 185 Datasheet Volume One of Two Processor Land Listing AE31 VSS GND AE33 DDR2_DQ[26] SSTL I/O AE35 DDR2_DQ[25] SSTL I/O AE37 DDR2_DQ[15].
Processor Land Listing 186 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two AH48 PE3C_RX_DN[8] PCIEX3 I AH50 PE3C_RX_DN[10] PCIEX3 I AH52 PE_RBIAS P CIEX3 I/.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 187 Datasheet Volume One of Two Processor Land Listing AN47 PE3D_RX_DP[13] PCIEX3 I AN49 PE2A_TX_DP[0] PCIEX3 O AN5 VCC PWR AN51 PE2A_TX.
Processor Land Listing 188 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two AV44 BPM_N[3] ODCMOS I/O AV4 6 R S V D AV48 PE2D_TX_DP[ 14] PCIEX3 O AV50 PE2D_TX.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 189 Datasheet Volume One of Two Processor Land Listing BB12 VCC PWR BB14 VCC PWR BB16 VCC PWR BB2 VCC PWR BB4 VCC PWR BB42 VSS GND BB44 .
Processor Land Listing 190 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two BG1 VCC PWR BG11 VCC PWR BG13 VCC PWR BG15 VCC PWR BG17 VCC PWR BG3 VCC PWR BG43 .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 191 Datasheet Volume One of Two Processor Land Listing BL9 VSS GND BM10 VSS GND BM12 VSS GND BM14 VSS GND BM16 VSS GND BM2 VSS GND BM4 V.
Processor Land Listing 192 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two BT6 V C C PW R BT8 V C C PW R BU1 VCC PWR BU11 VCC PWR BU13 VCC PWR BU15 VCC PWR .
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 193 Datasheet Volume One of Two Processor Land Listing C15 VCCD_23 PWR C17 VCCD_23 PWR C19 VCCD_23 PWR C21 VCCD_23 PWR C23 VCCD_23 PWR C.
Processor Land Listing 194 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two CC21 DDR0_PAR_ERR_N SSTL I CC23 DDR0_CS_N[2] SSTL O CC25 DDR0_CS_N[7] SSTL O CC27.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 195 Datasheet Volume One of Two Processor Land Listing CF26 DDR0_CS_N[5] SSTL O CF28 DDR0_ODT[3] SSTL O CF30 VSS GND CF32 VSS GND CF34 V.
Processor Land Listing 196 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two CJ31 DDR0_DQ[41] SSTL I/O CJ33 DDR0_DQS_DP[05] SSTL I/O CJ35 DDR0_DQ[43] SSTL I/O.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 197 Datasheet Volume One of Two Processor Land Listing CM38 VSS GND CM4 DDR1_DQ[04] SSTL I/O CM40 VSS GND CM42 VSS GND CM44 BCLK0_DN C M.
Processor Land Listing 198 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two CR35 VSS GND CR37 DDR1_DQ[48] SSTL I/O CR39 DDR1_DQS_DN[06] SSTL I/O CR41 DDR1_DQ.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 199 Datasheet Volume One of Two Processor Land Listing CV30 VSS GND CV32 VSS GND CV34 VSS GND CV36 DDR1_DQ[53] SSTL I/O CV38 VSS GND CV4.
Processor Land Listing 200 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two D24 DDR3_MA[14] SSTL O D26 VSS GND D32 DDR3_DQ[18] SSTL I/O D34 DDR3_DQS_DP[11] S.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 201 Datasheet Volume One of Two Processor Land Listing DC33 DDR1_DQS_DP[14] S STL I/O DC35 DDR1_DQ[42] SSTL I/O DC37 DDR1_DQ[61] SSTL I/.
Processor Land Listing 202 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two E17 DDR3_ODT[2] SSTL O E19 DDR3_BA[1] SSTL O E21 DDR3_MA[01] SSTL O E23 DDR3_MA[1.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 203 Datasheet Volume One of Two Processor Land Listing H12 VSS GND H14 VSS GND H16 VCCD_23 PWR H18 VCCD_23 PWR H2 DDR3_DQ[57] SSTL I/O H.
Processor Land Listing 204 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two K6 DDR3_DQS_DP[06] SSTL I/O K8 VSS GND L1 DDR3_DQ[62] SSTL I/O L11 DDR3_DQS_DN[05] SSTL I/O L13 DDR3_DQ[41] SSTL I/O L15 DRAM_PWR_OK_C23 CMOS1.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 205 Datasheet Volume One of Two Processor Land Listing N7 DDR3_DQ[50] SSTL I/O N9 VSS GND P10 VSS GND P12 VSS GND P14 VSS GND P16 DDR2_W.
Processor Land Listing 206 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two U13 DDR2_DQ[49] SSTL I/O U15 DDR23_RCOMP[0] Analog I U17 DDR2_RAS_N SSTL O U19 DD.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 207 Datasheet Volume One of Two Processor Land Listing § Y18 DDR2_OD T[3] SSTL O Y20 DDR2_OD T[0] SSTL O Y22 DDR2_ CLK_DN [1] SSTL O Y2.
Processor Land Listing 208 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families, 209 Datasheet Volume One of Two Package Mechanical Specifications 9 Package Mechanical Specifications The processor is packaged in a Flip-Chip Land Grid Arr ay (FCLGA12) package that interfaces with the baseboard via an LGA2 011-0 sock et.
Package Mechanical Specifications 210 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 9.2 Package Mechanical Drawing (PMD) The package mechanical dr awings are sh own as package A size 52.5 mm x 45 mm, Figure 9-2 and Figure 9-3 , and package B siz e 52.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families, 211 Datasheet Volume One of Two Package Mechanical Specifications Figure 9-2. Processor PMD Package A (52.
Package Mechanical Specifications 212 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 9-3. Processor PMD Package A (5 2.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families, 213 Datasheet Volume One of Two Package Mechanical Specifications Figure 9-4. Processor PMD Package B (5 2.
Package Mechanical Specifications 214 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 9-5. Processor PMD Package B (52.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families, 215 Datasheet Volume One of Two Package Mechanical Specifications 9.3 Processor Component Keep-Out Zones The processor may contain components on the substrate that define component keep-out zone requirements.
Package Mechanical Specifications 216 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 9.7 Processor Mass Specificat ion The typical mass of the processor is currently 45 gr ams. This mass [weight] includes all the components that are included in the package.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 217 Datasheet Volume One of Two Boxed Processor Specifications 10 Boxed Processor Specifications 10.1 Introduction Intel box e d processors are intended for sy stem integr ators who build systems from components av ailable through distribution channels.
Boxed Processor Specifications 218 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The STS200C utilizes a fan capable of 4-pin pulse width modulated (PWM) control.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 219 Datasheet Volume One of Two Boxed Processor Specifications sink solutions. The retention solution used for the S TS200P Heat Sink Solution is called the ILM R e tention System (ILM-RS).
Boxed Processor Specifications 220 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 10-4. Boxed Processor Moth erboard Keepout Zone s (1 of 4) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A 2X 46.0 SOCKET ILM HOLE PATTERN 2X 69.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 221 Datasheet Volume One of Two Boxed Processor Specifications Figure 10-5. Boxed Processor Motherboard Keepout Zones (2 of 4) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A 2200 MISSION COLLEGE BLVD.
Boxed Processor Specifications 222 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 10-6. Boxed Processor Moth erboard Keepout Zone s (3 of 4) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A 2X 23.40 2200 MISSION COLLEGE BLVD.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 223 Datasheet Volume One of Two Boxed Processor Specifications Figure 10-7. Boxed Processor Motherboard Keepout Zones (4 of 4) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A 76.50 81.50 2200 MISSION COLLEGE BLVD.
Boxed Processor Specifications 224 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 10-8. Boxed Processor Heat Sink Volumetric (1 of 2) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A 2200 MISSION COLLEGE BLVD.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 225 Datasheet Volume One of Two Boxed Processor Specifications Figure 10-9. Boxed Processor He at Sink Volumetric (2 of 2) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A A A 2200 MISSION COLLEGE BLVD.
Boxed Processor Specifications 226 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 10-10.4-Pin Fan Cable Connector (For Active Heat Sink).
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 227 Datasheet Volume One of Two Boxed Processor Specifications Figure 10-11.4-P in Base Baseboard Fa n Header (For Active Heat Sink).
Boxed Processor Specifications 228 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 10.2.2 Boxed Processor Retention Mechanism and H eat Sink Support (ILM-RS.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 229 Datasheet Volume One of Two Boxed Processor Specifications 10.3.1 Boxed Processor Cooling Requirements As previously stated the box ed processor will have three thermal solutions available.
Boxed Processor Specifications 230 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 10.3.1.2 STS200P and STS200PNR W (25.5m m Tall Pa ssive Heat Sink Solution) (Blade + 1U + 2U Rack) These passive solutions are intended for use in S SI Blade, 1U or 2U rack configurations.
Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 231 Datasheet Volume One of Two Boxed Processor Specifications Notes: 1. Local ambient temperature of the air entering the heatsink or fan. System ambien t and altitude are assumed 35C and sea level.
Boxed Processor Specifications 232 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 10.4 Boxed Processor Contents The Box ed Processor and Boxed Th ermal Solution contents are outlined below .
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