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DAQ 6023E/6024E/6025E User Manual Multifunction I/O Devices for PCI, PXI , CompactPCI, and PCMCIA Bus Computers 6023E/6024E/6025E User M anual ™ December 2000 Edition Part Number 322072 C-01.
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Important Information Warranty The DAQCard-6024E, PCI-6023E, PCI-60 24E, PCI-6025E, and PXI-6025E devices are warranted against defects in materials and workmanshi p for a period of one year from t he date of s hipment, as e videnced by rec eipts or other document ation.
© National Instruments Corporatio n v 6023E/6024E/6025E User Manu al Contents About This Manual Conventions Used in This Manual ................. ............................. ......................... .......... xi Related Documentation ............
Contents 6023E/6024E/6025E U ser Manual vi ni.com Chapter 4 Signal Connections I/O Connector ............. ......................... ............ .............. ......................... ........... ............ 4-1 Analog Input Signal Overview ......
Contents © National Instruments Corporatio n vii 6023E/6024E/602 5E User Manual Waveform Generation Timing Connections ........................ ......................... .. 4-40 WFTRIG Signal ........... ......................... ........... ........
Contents 6023E/6024E/60 25E User Manual viii ni.com Figures Figure 1-1. The Relationship Between th e Programming Environ ment, NI-DAQ, and Your Hardware....................... ........... ............... .............. 1-5 Figure 3-1. PCI-6023E, PCI-6024E, PCI-6 025E, and PXI-6025E Block Diagram .
Contents © National Instruments Corporatio n ix 6023E/6024E/602 5E User Manual Figure 4-30. WFTRIG Input Signal Timing ........................... ............................ ....... 4-41 Figure 4-31. WFTRIG Output Signal Timing.....................
© National Instruments Corporatio n xi 6023E/6024E/602 5E User Manual About This Manual The 6023, 6024, and 602 5 E Series boards are high-perform ance multifunctio n analog, digital, and timing I/ O boards for PCI, PX I, PCMCIA, and Compact PCI bus computers.
About This Man ual 6023E/6024E/6025E U ser Manual xii ni.com programs, subprograms, subroutines, device names, functions, operations, v ariables, file names and e xtensions, and code e xcerpts. NI-D A Q NI-D A Q refers to the NI-DA Q driv e r software for PC compatib le computers unless otherwise noted.
© National Instruments Corporatio n 1-1 6023E/6024E/602 5E User Manual 1 Introduction This chapter describes the 6023E, 6024E, and 6025E devices, lists what you need to get started, gives unpacking i nstructions, and describes the optional software and equipment.
Chapter 1 Introduction 6023E/6024E/6025E U ser Manual 1-2 ni.com These de vices can interface to an SCXI system — the instrument ation front end for plug-in D A Q devices — so that you can acquire analog signals from thermocouples, R TDs, strain gauges, voltage sources, and current sources .
Chapter 1 Introduction © National Instruments Corporatio n 1-3 6023E/6024E/602 5E User Manual ❑ 6023E/6024E/6025E User M anual ❑ One of the follo wing software packages and documentation: – Lab.
Chapter 1 Introduction 6023E/6024E/6025E U ser Manual 1-4 ni.com programming interface for building virtual instruments. For V isual C++ de velopers, Measurement Studio offers a set of V isual C++ classes and tools to integrate those classes into V isual C++ application s.
Chapter 1 Introduction © National Instruments Corporatio n 1-5 6023E/6024E/602 5E User Manual Figure 1-1. The Relationship Between the Programming Environment, NI-DAQ, and Y our Hardware T o download a free copy of the most recent v ersion of NI-DA Q, click Downloa d Software at ni.
Chapter 1 Introduction 6023E/6024E/6025E U ser Manual 1-6 ni.com For more information about these products, refer to the N ational Instruments catal ogue or web site or call the off ice nearest you .
© National Instruments Corporatio n 2-1 6023E/6024E/602 5E User Manual 2 Installation and Configuration This chapter explains how to install and co nfigure your 6023E, 6024E, or 6025E device. Software Installation Install your software before installing your device.
Chapter 2 Installation and Configuration 6023E/6024E/6025E U ser Manual 2-2 ni.com Hardware Installation After installing your software, you are ready to install your hard ware.
Chapter 2 Installation and Configuration © National Instruments Corporatio n 2-3 6023E/6024E/602 5E User Manual 4. T ouch any metal part of your computer chassis to discharge any static electricity that might be on your clothes or body . 5. Insert the device into a 5 V PXI slot.
© National Instruments Corporatio n 3-1 6023E/6024E/602 5E User Manual 3 Hardware Overview This chapter presents an ov erview of the hardware functions on y our device. Figure 3-1 shows a block diagram for t he PCI-6023E, PCI-6024E, PCI-6025E, and PXI-602 5E.
Chapter 3 Hardware Over view 6023E/6024E/6025E U ser Manual 3-2 ni.com Figure 3-2 shows the block diagram for the DA QCard-6024E. Figure 3-2. DAQCard-6024E Block Diagram Analog Input The analog input section of each device is software configurable. The following sections describe in detail each of the analog input settin gs.
Chapter 3 Hardware Over view © National Instruments Corporatio n 3-3 6023E/6024E/602 5E User Manual For diagrams sho wing the signal paths o f the three configurations, refer to the Analog Input Signal Overview section in Chapter 4, Signal Connections .
Chapter 3 Hardware Over view 6023E/6024E/6025E U ser Manual 3-4 ni.com Dithering When you enable dithering, you add approximat ely 0.5 LSB rms of white Gaussian noise to the signal to be converted by the ADC.
Chapter 3 Hardware Over view © National Instruments Corporatio n 3-5 6023E/6024E/602 5E User Manual Figure 3-3. Dithering Multichannel Scanning Considerations The devices can scan multiple channels at the same maximum rat e as their single-channel rate; however, pay carefu l attention to the settling tim es for each of the devices.
Chapter 3 Hardware Over view 6023E/6024E/6025E U ser Manual 3-6 ni.com The approximately 4 V step from 4 V to 1 mV is 4,000% of the new full-scale range. It can take as long as 100 µs for the circuitry to settle to 1 LSB after such a lar ge tran sition.
Chapter 3 Hardware Over view © National Instruments Corporatio n 3-7 6023E/6024E/602 5E User Manual Digital I/O The devices contain eight lines of digital I/O (DIO<0..7>) for general-purpose use. You can individually software-configure each line for either input or output.
Chapter 3 Hardware Over view 6023E/6024E/6025E U ser Manual 3-8 ni.com Figure 3-4. CONVERT* Signal Routing Figure 3-4 sho ws that CONVER T* can be generated from a number of sources, including the external signals R TSI<0..6> (PCI and PXI buses only) and PFI<0.
Chapter 3 Hardware Over view © National Instruments Corporatio n 3-9 6023E/6024E/602 5E User Manual scheme reduces the need to change physical connections to the I/O connector for different applicat ions. Y ou can also individually enable each of the PFI pins to output a specific internal timing signal.
Chapter 3 Hardware Over view 6023E/6024E/60 25E User Manual 3-10 ni.com Figure 3-5. PCI R TSI B us Signal Connection RTSI Bus Connector switch RTSI Switch Clock Trigger 7 DAQ-STC TRIG1 TRIG2 CONVERT* .
Chapter 3 Hardware Over view © National Instruments Corporatio n 3-11 6023E/6024E/6025E User Manual Figure 3-6. PXI R TSI B us Signal Connection T able 3-3 lists the name and number of pin s used by the PXI-6025E.
© National Instruments Corporatio n 4-1 6023E/6024E/602 5E User Manual 4 Signal Connections This chapter describes how to make input and output signal connections to your device through the I/O connector. T able 4-1 shows the cables that can be used with the I/O connectors to connect to different accessories.
Chapter 4 Signal Connecti ons 6023E/6024E/6025E U ser Manual 4-2 ni.com assignments of the opti onal 50- and 68-pin connect ors. A signal description follows the fig ures.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-3 6023E/6024E/602 5E User Manual Figure 4-2. I/O Connector Pin Assignment for the 6025E 50 100 49 99 48 98 47 97 46 96 45 95 44 94 4.
Chapter 4 Signal Connecti ons 6023E/6024E/6025E U ser Manual 4-4 ni.com T able 4-2 sho ws the I/O connector signal descriptions for the 6023E, 6024E, and 6025E.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-5 6023E/6024E/602 5E User Manual SCANCLK DGND Output scan clock — this pin pulses once for each A/D conv ersion in scanning mode when enabled. The low-to-high edge indicates when the input signal can be remo ved from the input or switched to another signal.
Chapter 4 Signal Connecti ons 6023E/6024E/6025E U ser Manual 4-6 ni.com PFI5/UPD A TE* DGND Input Output PFI5/Update — as an input, this is one of the PFIs. As an output, this is the UPDA T E* (A O Update) signal. A high-to-lo w edg e o n UPD A TE* indicates that the analog output primary group is being up d ated for the 6024E or 6025E.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-7 6023E/6024E/602 5E User Manual T able 4-3 shows the I/O signal summary for the 6023E, 6024E, and 6025E.
Chapter 4 Signal Connecti ons 6023E/6024E/6025E U ser Manual 4-8 ni.com Analog Input Signal Over view The analog input signals for these devices are ACH<0.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-9 6023E/6024E/602 5E User Manual Floating Signal Sources A floating signal source is not con nected in any way to the building g round system, but has an isolated ground-reference point.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-10 ni.com Figure 4-3. Programmable Gain Instrumentation Amplifier (PGIA) In single-ended mode (RSE and NRSE), signals connected to A CH<0..15> are routed to the positiv e input of the PGIA.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-11 6023E/6024E/6025E User Manual gain setting of the amplifier . The amplifier output v oltage is referenced to the ground for the device. The A/D con verter (ADC) of your device measures this output voltage when it perform s A/D con versions.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-12 ni.com Figure 4-4. Summar y of Analog Input Connections Input Diff erential (DIFF) Single-Ended — Ground Referenced (RSE) Single-End.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-13 6023E/6024E/6025E User Manual Differential Connection Considerations (DIFF Input Configuration) A DIFF connection is one in which the analog in put signal has its own reference signal or signal return path.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-14 ni.com Differential Connections for Ground-Referenced Signal Sources Figure 4-5 shows how to connect a ground-referenced sig nal source to a channel on the device configured in DIFF input mo de.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-15 6023E/6024E/6025E User Manual Differential Connections for Nonreferenced or Floating Signal Sources Figure 4-6 shows h ow to connect a floating s ignal source to a chan nel configured in DIFF input mode.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-16 ni.com Y ou must reference the source to AIGND. The easiest way is to connect the positiv e side of the signal to the positiv e input of the PGIA and connect the negati ve side of the sig nal to AIGND as well as to the negati ve input of the PGIA, without any resistors at all.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-17 6023E/6024E/6025E User Manual Single-Ended Connection Considerations A single-ended connection i s one in which the device analog i nput signal is referenced to a ground th at it can share with o ther input signals.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-18 ni.com Single-Ended Connections for F loating Signal Sources (RSE Configuration) Figure 4-7 shows h ow to connect a floating s ignal source to a chan nel configured for RSE mode. Figure 4-7.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-19 6023E/6024E/6025E User Manual Figure 4-8 shows ho w to connect a groun ded signal source to a channel configured for NRSE mode.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-20 ni.com A O GND is the ground reference sign al for both analog output chann els and the external reference signal. Figure 4-9 shows ho w to make analog output connections to your d e vi ce.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-21 6023E/6024E/6025E User Manual Figure 4-10. Digital I/O Connections Figure 4-10 shows DIO<0..3> configured for digital input and DIO<4..7> configured for d igital output.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-22 ni.com Figure 4-11. Digital I/O Connections Block Diagram Programmable Peripheral Interface (PPI) ♦ 6025E only The 6025E device uses an 82C55A PPI to pro vide an addi tional 24 lines of digital I /O that represen t three 8-bit p orts — P A, PB , and PC.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-23 6023E/6024E/6025E User Manual TTL signals and dri ving external de vices such as the LED sho wn in Figure 4-11. Port C Pin Assignments ♦ 6025 only The signals assigned to port C depend on how the 82C55A is configured.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-24 ni.com Power -up State ♦ 6025E only The 6025E contains bias resistors that control the state of the digital I/O lines P A<0..7>,PB<0..7>,PC<0..7> at po w er up. Each digital I/O line is configured as an input, pulled high by a 100 k Ω bias resistor .
Chapter 4 Signal Connections © National Instruments Corporatio n 4-25 6023E/6024E/6025E User Manual 2. Using the following formula, calculate the lar gest possible load to maintain a logic low le vel of 0.4 V and supply the maxim um driving current: V = I × RL ⇒ RL = V / I where: V = 0.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-26 ni.com AC K * Input Acknowledge input — a lo w signal on this handshaking line indicates that the data written to the port has been accepted. This signal is a response from the external de vice indicating that it has recei ved the data from your DIO device.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-27 6023E/6024E/6025E User Manual Mode 1 Input T iming Timing specifications for an input trans fer in mode 1 are shown in Figure 4-13.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-28 ni.com Mode 1 Output T iming Timing specifications for an output transfer in mode 1 are shown in Figure 4-14.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-29 6023E/6024E/6025E User Manual Mode 2 Bidirectional T iming Timing specifications for a bidirectional transfer in mode 2 are shown in Figure 4-15.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-30 ni.com Power Connections Two pins on the I/0 connector supply + 5 V from the computer power supply through a self-resetting fuse. The fuse resets automatically within a few seconds after the o vercurrent conditio n is removed.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-31 6023E/6024E/6025E User Manual Figure 4-16. Timing I/O Connections Programmable Function Input Connections There are a total of 13 intern al timing signals that you can externall y control from the PFI pins.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-32 ni.com depends upon the particular tim ing signal you are controlling. The detection requirements for each timing signal are listed within the section that discusses that individual signal.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-33 6023E/6024E/6025E User Manual Figure 4-18. T ypical Pretriggered Acquisition SCANCLK Signal SCANCLK is an output-only signal that generates a p ulse with the leading edge occurring app roximately 50 to 100 n s after an A/D conver sion begins.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-34 ni.com Figure 4-20. EXTSTROBE* Signal Timin g TRIG1 Signal Any PFI pin can externally input the TRIG1 signal, which is available as an output on the PFI0/TRIG1 pin. Refer to Figures 4-17 and 4-18 for the relationship of T RIG1 to the D A Q sequence.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-35 6023E/6024E/6025E User Manual Figure 4-22. TRIG1 Output Signal Timing The de vice also uses the TRIG1 signal to initiate pretriggered DA Q operations. In most pretriggered applications, the TRIG1 sign al is generated by a softw are trigger .
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-36 ni.com Figures 4-23 and 4-24 show the input and output timing requirements for the TRIG2 signal .
Chapter 4 Signal Connections © National Instruments Corporatio n 4-37 6023E/6024E/6025E User Manual deasserted t off after the last con version in the scan is initiated. This out put is set to high impedance at startup. Figures 4-25 and 4-26 show the input and output timing requirements for the ST AR TSCAN signal.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-38 ni.com A counter on your device internally generates the S T AR TSCAN signal unless you select some external source. This counter is started b y the TRIG1 signal and is stopped either by software or b y t he sample counter .
Chapter 4 Signal Connections © National Instruments Corporatio n 4-39 6023E/6024E/6025E User Manual Figure 4-28. CONVERT* Outp ut Signal Timing The sample interv al counter on the de vice normally generates the CONVER T* signal unless you select some external source.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-40 ni.com SISOURCE Signal Any PFI pin can externally input the SISOURCE signal, which is not available as an output on the I/O connect or. The onboard scan interval counter uses the SISOURCE signal as a clock to time the generation of the STARTSCAN signal.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-41 6023E/6024E/6025E User Manual As an output, the WFTRIG sign al reflects the trigger that ini tiates wa veform generation. This is true even if the wa veform gen eration is externally triggered by another PFI.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-42 ni.com As an output, the UPD A TE* signal reflects the actual update pulse that is connected to the DA Cs. This is true ev en if the updates are externally generated by another PFI. The output is an activ e low pulse with a pulse width of 300 to 350 ns.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-43 6023E/6024E/6025E User Manual signal. You must co nfigure the PFI pin you select as t he source for the UISOURCE signal in the level-detection mode. You can config ure the polarity selection for the PFI pin for either active high or active low.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-44 ni.com Figure 4-35 shows the timing requirements f or the GPCTR0_SO URCE signal. Figure 4-35. GPCTR0_SOURCE Signal T iming The maximum allowed frequency is 20 MHz, with a minimum pulse wid th of 23 ns high or low .
Chapter 4 Signal Connections © National Instruments Corporatio n 4-45 6023E/6024E/6025E User Manual Figure 4-36. GPCTR0_GA TE Signal Timing in Edge-Detection Mode GPCTR0_OUT Signal This signal is available only as an outpu t on the GPCTR0_OUT pin. The GPCTR0_OUT signal reflects the terminal count ( TC) of general-purpose counter 0.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-46 ni.com GPCTR1_SOURCE Signal Any PFI pin can externally input the GPCTR1_SOURCE sign al, which is available as an output on the PFI3/G PCTR1_SOURCE pin. As an inpu t, the GPCTR1_SOURCE signal is configured in the edge-detection mode.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-47 6023E/6024E/6025E User Manual As an output, the GPCTR1_GA TE signal monitors th e actual gate signal connected to general-purpose counter 1. This is true e ven if the gate is externally generated by another PFI.
Chapter 4 Signal Connecti ons 6023E/6024E/60 25E User Manual 4-48 ni.com leave the DIO7 pin free for general use. Figure 4-41 sho ws the timing requirements for the GATE and SOURCE input signals and the timing specifications for the OUT outp ut signals of your device.
Chapter 4 Signal Connections © National Instruments Corporatio n 4-49 6023E/6024E/6025E User Manual If you use an internal timebase clock, the gate signal cannot be synchronized with the clock. In this case, gates appli ed close to a source edge take ef fect either on that source edge or on the ne xt one.
© National Instruments Corporatio n 5-1 6023E/6024E/602 5E User Manual 5 Calibration This chapter discusses the calibration procedures for your device. If you are using the NI-DAQ device driver, that software includes calibration functions for perf orming all of the steps in the calibration process.
Chapter 5 Calibration 6023E/6024E/6025E U ser Manual 5-2 ni.com This method of calibration is not very accurate because it does not take into account the fact that the de vice measurement and output v oltage errors can v ar y with time and tem perature.
Chapter 5 Calibration © National Instruments Corporatio n 5-3 6023E/6024E/602 5E User Manual Other Considerations The CalDACs adjust the gain error of each analog output channel by adjusting the value of the reference voltage supplied to that channel.
© National Instruments Corporatio n A- 1 6023 E/6024E/6025E User Manual A Specifications This appendix indi v idually lists the specifications of each b us type and are typical at 25 ° C. PCI and PXI Buses Analog Input Input Characteristics Number of channels .
Appendix A Specifications for PCI and PXI Buses 6023E/6024E/6025E U ser Manual A- 2 ni.com Overvoltage protection FIFO buffer size ............... .......................512 S Data transfers ........................ .............. .... DMA, interrupts, programmed I/O DMA modes .
Appendix A Specifications for PCI and PXI Buses © National Instruments Corporatio n A- 3 6023 E/6024E/6025E User Manual T ransfer Characteristics Relative accuracy ................................... ±0.5 LSB typ dithered, ±1.5 LSB max undithered DNL .
Appendix A Specifications for PCI and PXI Buses 6023E/6024E/6025E U ser Manual A- 4 ni.com Dynamic Characteristics Bandwidth Settling time for full-scale step ...............5 µ s max to ±1.0 LSB accuracy System noise (LSB rms , not in cluding quantizat ion) Crosstalk .
Appendix A Specifications for PCI and PXI Buses © National Instruments Corporatio n A- 5 6023 E/6024E/6025E User Manual FIFO buffer size ...................... ............... None Data transfers .................. .............. ......... DMA, interrupts, programmed I/O DMA modes .
Appendix A Specifications for PCI and PXI Buses 6023E/6024E/6025E U ser Manual A- 6 ni.com V oltage Output Range .............. ......................... ...............± 10 V Output coupling ....................... .............. . DC Output impedance .
Appendix A Specifications for PCI and PXI Buses © National Instruments Corporatio n A- 7 6023 E/6024E/6025E User Manual Digital I/O Number of channels 6025E .............................................. 32 input /output 6023E and 6024E .............
Appendix A Specifications for PCI and PXI Buses 6023E/6024E/6025E U ser Manual A- 8 ni.com Handshaking ........... .............. ..................2-wire Power-on state PA<0..7> ......... .......................... ......Input (High-Z), 100 k Ω p u l l - u pt o+ 5V D C PB<0.
Appendix A Specifications for PCI and PXI Buses © National Instruments Corporatio n A- 9 6023 E/6024E/6025E User Manual T riggers Digital T rigger Compatibility .................. .............. ......... TTL Response ................................
Appendix A Specifications for PCI and PXI Buses 6023E/6024E/60 25E User Manual A-10 ni.com I/O connector 6023E/6024E ............... .............. ......68-pin male SCSI-II type 6025E ............... .............. ..................100-pin female 0.
Appendix A Specifications for PCMCIA Bus © National Instruments Corporatio n A-11 6023E/6024E/6025E User Manu al PCMCIA Bus Analog Input Input Characteristics Number of channels ........................... .... 16 single-ended or 8 differential (software-selectable per channel) Type of ADC .
Appendix A Specifications for PCMCIA Bus 6023E/6024E/60 25E User Manual A-12 ni.co m Accuracy Information T ransfer Characteristics Relative accuracy .................................... ±0.5 LSB typ d ithered, ±1.5 LSB max undithered DNL ..........
Appendix A Specifications for PCMCIA Bus © National Instruments Corporatio n A-13 6023E/6024E/6025E User Manu al Amplifier Characteristics Input impedance Normal powered on ............ ............ 100 G Ω in parallel with 100 pF Powered off .....
Appendix A Specifications for PCMCIA Bus 6023E/6024E/60 25E User Manual A-14 ni.co m Gain temperature coefficient .............. ....±20 ppm/ ° C Analog Output Output Characteristics Number of channels ............ ....................2 voltage Resolution .
Appendix A Specifications for PCMCIA Bus © National Instruments Corporatio n A-15 6023E/6024E/6025E User Manu al Offset error After calibration .................. ............ ±1.0 mV max Before calibration .................. ......... ±200 mV max Gain error (relative to internal reference) After calibration .
Appendix A Specifications for PCMCIA Bus 6023E/6024E/60 25E User Manual A-16 ni.co m Stability Offset temperature coefficient ............... . ±50 µ V/ ° C Gain temperature coefficient .............. ....±25 ppm/ ° C Digital I/O Number of channels .
Appendix A Specifications for PCMCIA Bus © National Instruments Corporatio n A-17 6023E/6024E/6025E User Manu al Base clocks available Counter/timers ...... .............. ............ 20 MHz, 100 kHz Frequency scalers ................ ............ 10 MHz, 100 kHz Base clock accuracy .
Appendix A Specifications for PCMCIA Bus 6023E/6024E/60 25E User Manual A-18 ni.co m Physical PC card type ............ .............. .............. ....Type II I/O connector ..........................................68 -position VHDCI female connector Environment Operating temperature .
© National Instruments Corporatio n B- 1 6023 E/6024E/6025E User Manual B Custom Cabling and Optional Connectors This appendix describes the v arious cabling and connecto r options for the D A QCard-6024E, PCI-6023E, PCI-60 24E, PCI-6025E, and PXI-6025E de vices.
Appendix B Custom Cabl ing and Optional Connecto rs 6023E/6024E/6025E U ser Manual B- 2 ni.com ♦ 6025E AMP 100-position IDC mal e connector AMP backshell, 0.50 max O.D. cable AMP backshell, 0.55 max O.D. cable Mating connectors and a backshell kit for making custom 68-pin cables are av ailable from Nat ional Instruments.
Appendix B C ustom Cabling and Optiona l Connecto rs © National Instruments Corporatio n B- 3 6023 E/6024E/6025E User Manual Figure B-1 shows the pin assignments for th e 68-Pin E Series connecto r .
Appendix B Custom Cabl ing and Optional Connecto rs 6023E/6024E/6025E U ser Manual B- 4 ni.com Figure B-2 shows the pin assignments for the 68-pin extended digital input connector .
Appendix B C ustom Cabling and Optiona l Connecto rs © National Instruments Corporatio n B- 5 6023 E/6024E/6025E User Manual Figure B-3 shows the pin assignments for th e 50-pin E Series connector .
Appendix B Custom Cabl ing and Optional Connecto rs 6023E/6024E/6025E U ser Manual B- 6 ni.com Figure B-4 shows the pin assignments for the 50-pin extended digital input connector .
© National Instruments Corporatio n C- 1 6023 E/6024E/6025E User Manual C Common Questions This appendix contains a list of commonl y asked questions and their answers relating to usage and special features of your device.
Appendix C Common Q u estions 6023E/6024E/6025E U ser Manual C- 2 ni.com Installation and Configuration How do I set the base addres s f or my device? The base address of your device is assigned automatically through the PCI/PXI bus protocol. This assignment is completely transparent to yo u.
Appendix C Common Questio ns © National Instruments Corporatio n C- 3 6023 E/6024E/6025E User Manual deglitching filter to remov e some of these gli tches, depending on the frequency and nature of your output si gnal.
Appendix C Common Q u estions 6023E/6024E/6025E U ser Manual C- 4 ni.com 24-bit counters (unlike the 1 6-bit counters on d e vices without the DAQ- S T C ) . If you are using the NI-D A Q language interface or LabW indo ws/CVI, the answer is no, the counter/ timer applications that you wrote previously will not work with the D A Q-STC.
Appendix C Common Questio ns © National Instruments Corporatio n C- 5 6023 E/6024E/6025E User Manual after power on, and T able 4-3, I/O Si gnal Summary , shows that there is a 50 k Ω pull-up resistor . This pull-up resistor sets the DIO(0 ) pin to a logic high when the output is in a high imped ance state.
© National Instruments Corporatio n D-1 6023E/6024E/6025E User Manu al D T echnical Support Resources W eb Support National Instruments W eb support is your first stop for help in solving installation, configuration, and application pro blems and questions.
Appendix D T echnical Support Resour ces 6023E/6024E/60 25E User Manual D-2 ni.com W orldwide Support National Instruments has of fices located around the world to help address your support needs. Y ou can access our branch of f ice W eb sites from the W o rldwide Of fices section of ni.
© National Instruments Corporatio n G-1 6023E/6024E/6025E User Manu al Glossar y Pref ix Meanings V alue p- pico- 10 – 12 n- nano- 10 – 9 µ- micro- 10 – 6 m- milli- 10 – 3 k- kilo- 10 3 M- m.
Glossary 6023E/6024E/60 25E User Manual G-2 ni.com A A amperes A C alternating current A CH analog input channel signal A/D analog-to-digital ADC analog-to-digital con verter — an electronic de vice.
Glossary © National Instruments Corporatio n G-3 6023E/6024E/6025E User Manu al bus the group of conductors that in terconnect individual circuitry in a computer . T ypically , a bus is the expansion interface to which I/O or other devices are connected.
Glossary 6023E/6024E/60 25E User Manual G-4 ni.com D A Q data acquisition — (1) collecting and measuring electrical signals from sensors, transducers, and test probes or fixtures and processing the .
Glossary © National Instruments Corporatio n G-5 6023E/6024E/6025E User Manu al electrostatically coupled propagating a signal by means of a v arying electric field EXTSTR OBE e xternal strobe sign a.
Glossary 6023E/6024E/60 25E User Manual G-6 ni.com GPCTR1_UP_DO W N general purpose counter 1 up down GPIB General Purpose Interface bus, synon ym ous with HP-IB. The standard bus used for controlling electronic instruments with a computer . Also called IEEE 488 bus becaus e it is defined b y ANSI/IEEE Standards 488-1978, 488.
Glossary © National Instruments Corporatio n G-7 6023E/6024E/6025E User Manu al I OL current, output low IRQ int errupt request K kk i l o — the standard metric prefix for 1,000, or 10 3 , used w i.
Glossary 6023E/6024E/60 25E User Manual G-8 ni.com N NI-D A Q Na ti o n al In s tr u m en t s dri ver software for D A Q hardware noise an undesirable electrical signal — Noise comes from external s.
Glossary © National Instruments Corporatio n G-9 6023E/6024E/6025E User Manu al PFI7/ST AR TSCAN PFI7/start of scan PFI8/GPCTR 0_ SOURCE PFI8/general purpose cou nter 0 source PFI9/GPCTR0_GA TE PFI9/.
Glossary 6023E/6024E/60 25E User Manual G-10 ni.com RSE referenced single-ended mode — all measurements are made with respect to a common reference measurement system or a ground.
Glossary © National Instruments Corporatio n G-11 6023E/6024E/602 5E User Manual SISOURCE SI counter clock signal software trigger a programmed e vent that triggers an e vent such as data acquisition software triggering a meth od of triggering in which you simulate an analog trigger using software.
Glossary 6023E/6024E/60 25E User Manual G-12 ni.com update the output equiv alent of a scan. On e or more analog or dig ital output samples. T ypically , the num ber of output samples in an upd ate is equal to the number of channels in the output group.
Glossary © National Instruments Corporatio n G-13 6023E/6024E/602 5E User Manual W wa veform multiple voltage readings taken at a speci fic sampling rate WFTRIG wa veform generation trigger sign al working voltage the highest voltage that should be applied to a product in n ormal use, normally well under the breakdown v oltag e for safety margin.
© National Instruments Corporatio n I-1 6023E/6024E/602 5E User Manual Index Numbers +5 V signal description (table), 4-4 self-resetting fuse, C-1 82C55A Programmable Peripheral Interface. See PPI (Programmable Peripheral Interface). 6023E/6024E/6025E devices.
Index 6023E/6024E/6025E U ser Manual I-2 ni.com dynamic characteristics, A-4 input characteristics, A-1 to A-2 stability, A-4 transfer characteristics, A-3 PCMCIA bus, A-11 to A-14 accuracy informatio.
Index © National Instruments Corporatio n I-3 6023E/6024E/602 5E User Manual D DAC0OUT signal analog output s ignal connecti ons, 4-19 to 4-20 description (table), 4-4 signal summary (table), 4-7 DAC.
Index 6023E/6024E/6025E U ser Manual I-4 ni.com EXTSTROBE* signal DAQ timing connections, 4-33 to 4 -34 description (table), 4-5 signal summary (table), 4-7 F field wiring consideratio ns, 4-49 floati.
Index © National Instruments Corporatio n I-5 6023E/6024E/602 5E User Manual I IBF signal description (table), 4-25 mode 1 input timing (fi gure), 4-27 mode 2 bidirection al timing (figure), 4-2 9 input modes, 3-2 to 3-3.
Index 6023E/6024E/6025E U ser Manual I-6 ni.com P PA<0..7> signal description (table), 4-4 digital I/O specifications, A-7 signal summary (table), 4-7 PB<0..7> signal description (table), 4-4 digital I/O specifications, A-7 signal summary (table), 4-7 PC<0.
Index © National Instruments Corporatio n I-7 6023E/6024E/602 5E User Manual power-up state, digital I/O, 4-24 to 4-25 PPI (Programmable Peripheral Interface) 6025E only, 4-22 to 4-23 changing DIO po.
Index 6023E/6024E/6025E U ser Manual I-8 ni.com analog output, 4-19 to 4-20 digital I/O, 4-20 to 4- 22 field wiring consideratio ns, 4-49 I/O connectors, 4-1 to 4-8 exceeding maximum ratings (warning).
Index © National Instruments Corporatio n I-9 6023E/6024E/602 5E User Manual physical, A-18 power requirements, A-17 timing I/O, A-16 to A -17 triggers, A-17 STARTSCAN signal, 4-36 to 4-38 STB* signa.
Index 6023E/6024E/60 25E User Manual I-10 ni.com U U I S O U R C Es i g n a l ,4 - 4 2t o4 - 4 3 unpacking 6023E/602 4E/6025E, 2-1 UPDATE* signal, 4-41 to 4-42 V VCC signal (table), 4-7 VirtualBench s.
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