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SMSC LAN9500/LAN9500i Revision 1.7 (10-02-08) DA T ASHEET Datasheet PRODUCT FEA TURES LAN9500/LAN9500i Hi-S peed USB 2.0 to 10/100 Ethernet Controller Highlight s Single Chip Hi-S peed USB 2.
Hi-S peed USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 2 Revision 1.7 (10-02-08) DA T ASHEET ORDER NUMBER(S): LAN9500-ABZJ FOR 56-PIN, QFN LEAD-FREE ROHS COMPLIANT P A CKAGE (.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 3 Revision 1.7 (10-02-08) DA T ASHEET T able of Content s Chapter 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 4 SMSC LAN9500/LAN9500i DA T ASHEET List of Figures Figure 1.1 LAN9500/LAN9500i System Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 5 Revision 1.7 (10-02-08) DA T ASHEET List Of T ables Table 2.1 MII Interface Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 6 SMSC LAN9500/LAN9500i DA T ASHEET Chapter 1 Introduction 1.1 Block Diagram 1.1.1 Overview The LAN9500/LAN9500i is a high pe rformance Hi-S peed USB 2.0 to 10/100 Ethernet controller .
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 7 Revision 1.7 (10-02-08) DA T ASHEET 1.1.2 USB The USB portion of the LAN9500/LAN9500i integrates a Hi-S peed USB 2 .
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 8 SMSC LAN9500/LAN9500i DA T ASHEET 1.1.6 EEPROM Controller The LAN9500/LAN9500i contains an EEPROM controller for connection to an external EEPROM.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 9 Revision 1.7 (10-02-08) DA T ASHEET Chapter 2 Pin Description and Configuration Figure 2.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 10 SMSC LAN9500/LAN9500i DA T ASHEET T able 2.1 MII Interface Pins NUM PINS NAME SYMBOL BUFFER TYPE DESCRIPTION 1 Rec.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 1 1 Revision 1.7 (10-02-08) DA T ASHEET 1 T ransmit Data 3 (External PHY Mode) TXD3 O8 (PU) T ransmit Data 3: In external PHY mode, this pin functions as the transmit data 3 output to the external PHY .
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 12 SMSC LAN9500/LAN9500i DA T ASHEET Note 2.1 Configuration strap va lues are latched on pow er-on reset and system reset. Configuration straps are identified by an u nderlined symbol n ame.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 13 Revision 1.7 (10-02-08) DA T ASHEET Note 2.2 Configuration strap va lues are latched on pow er-on reset and system reset. Configuration straps are identified by an u nderlined symbol n ame.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 14 SMSC LAN9500/LAN9500i DA T ASHEET 1 JT AG T est Clock (Internal PHY Mode) TCK IS (PU) JT AG T est Clock: In internal PHY mode, this pin functions as the JT AG test clock.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 15 Revision 1.7 (10-02-08) DA T ASHEET 1 Ethernet Link Activity Indicator LED nLNKA_LED OD12 (PU) Ethernet Link Activi ty Indicator LED (Active- Low): This signal is driven low (LED on) when a valid link is detected.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 16 SMSC LAN9500/LAN9500i DA T ASHEET T able 2.5 USB Pins NUM PINS NAME SYMBOL BUFFER TYPE DESCRIPTION 1 USB DMINUS USBDM AIO USB DMINUS Note: The functionality of this pin may be swapped to USB DPLUS via the PORT_SW AP configuration strap.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 17 Revision 1.7 (10-02-08) DA T ASHEET 1 PHY Interrupt (Internal PHY Mode) nPHY_INT O8 PHY Interrupt (Active-Low): In internal PHY mode, this signal can be configured to output the internal PHY interrupt signal.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 18 SMSC LAN9500/LAN9500i DA T ASHEET T abl e 2.9 56-QFN Package Pin Ass ignments PIN NUM PIN NAME PIN NUM PIN NAME PI.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 19 Revision 1.7 (10-02-08) DA T ASHEET 2.1 Buffer T ypes T abl e 2.10 Buffer T y pes BUFFER TYPE DESCRIPTION IS Schmitt.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 20 SMSC LAN9500/LAN9500i DA T ASHEET Chapter 3 EEPROM Controller (EPC) LAN9500/LAN9500i may use an external EEPROM to store the default values for the USB descriptors and the MAC address.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 21 Revision 1.7 (10-02-08) DA T ASHEET Note: EEPROM byte addresses past 1Dh can be used to store data for any purpose.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 22 SMSC LAN9500/LAN9500i DA T ASHEET 3.2 EEPROM Default s The signature value o f 0xA5 is stored at address 0. A dif ferent signature value indicates to the EEPROM controller that no EEPROM or an un-progra mmed EEPROM is attached to LAN9500/LAN9500i.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 23 Revision 1.7 (10-02-08) DA T ASHEET 3.4 An Example of EEPROM Format Interpret ation Ta b l e 3 . 4 and Ta b l e 3 . 5 provide an example of ho w the content s of a EEPROM are formatted .
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 24 SMSC LAN9500/LAN9500i DA T ASHEET T able 3.5 EEPROM Example - 256 Byte EEPROM EEPROM ADDRESS EEPROM CONTENT S (HEX.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 25 Revision 1.7 (10-02-08) DA T ASHEET 20h-27h 53 00 4D 00 53 00 43 0 0 Manufac turer ID S tring (“SMSC” in UNICODE.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 26 SMSC LAN9500/LAN9500i DA T ASHEET 64h 04 Descriptor T ype (Int erface Descriptor - 04h) 65h 00 Number i dentifying.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 27 Revision 1.7 (10-02-08) DA T ASHEET 88h 04 Descriptor T ype (Int erface Descriptor - 04h) 89h 00 Number i dentifying.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 28 SMSC LAN9500/LAN9500i DA T ASHEET Chapter 4 Operational Characteristics 4.1 Absolute Maximum Ratings* Supply V oltage (VDD33IO, VDD33A) ( Note 4.1 ) . . . . . . . . .
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 29 Revision 1.7 (10-02-08) DA T ASHEET 4.3 Power Consumption This section details the power consumption of LAN9 500/ LAN9500i as measured d uring various modes of operation.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 30 SMSC LAN9500/LAN9500i DA T ASHEET 4.3.4 Operational Power Consumption 4.3.5 Customer Evalua tion Board Operationa l Power Consumption T able 4.4 Ope rational Power Consumption - Su pply and Current @3.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 31 Revision 1.7 (10-02-08) DA T ASHEET 4.4 DC S pecifications Note 4.5 This specification appli es to all inputs and tri-stated bi-directional pins. In ternal pull-down and pull-up resi stors add +/- 50uA per-pin (typical).
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 32 SMSC LAN9500/LAN9500i DA T ASHEET Note 4.6 This is the total 5.5V input l eakage for the entire device. Note 4.7 XI can optionally be d riven from a 25MHz single-ended clock oscil lator .
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 33 Revision 1.7 (10-02-08) DA T ASHEET 4.5 AC S pecifications This section details the various AC timing specifications of the LAN9500/L AN9500i. Note: The MII timing adheres to the IEEE 802.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 34 SMSC LAN9500/LAN9500i DA T ASHEET 4.5.2 Power-On Configurat ion Strap V alid T iming Figure 4.2 illustrates the configuration strap vali d timi ng requirement in rel ation to power-on.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 35 Revision 1.7 (10-02-08) DA T ASHEET 4.5.3 Reset and Confi guration Strap T iming Figure 4.3 illustrates the nRESET pin ti ming requirement s and i ts relation to the configuration strap pins and output drive.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 36 SMSC LAN9500/LAN9500i DA T ASHEET 4.5.4 EEPROM Timing The following specifies th e EEPROM timing requirements for LAN9500/LAN950 0i: Figure 4.4 EEPROM T i ming T able 4.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 37 Revision 1.7 (10-02-08) DA T ASHEET 4.5.5 T urbo MII Interface Timing The external MII supports Turbo MII and the interface timing i s as follows. Note 4.12 These values satisfy the MII specification r equirement o f 0 ns to 25 ns clock to output delay .
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 38 SMSC LAN9500/LAN9500i DA T ASHEET Note 4.14 These values satisfy the 10-ns setup and hold time requirements that are necessary for the T urbo MII specificati on. T able 4.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 39 Revision 1.7 (10-02-08) DA T ASHEET 4.6 Clock Circuit LAN9500/LAN9500i can accept either a 25MHz crys tal (preferred) or a 25MHz single-ended clock oscillator (+/- 50ppm) input.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 40 SMSC LAN9500/LAN9500i DA T ASHEET Chapter 5 Package Outline Notes: 1. All dimensions are in mill imeters unless otherwise noted. 2. Position tolerance of each terminal and exposed pad is +/- 0.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 41 Revision 1.7 (10-02-08) DA T ASHEET Figure 5.2 LAN9500/LAN9500i 56-QF N Recommended PCB Land Pattern.
Hi-S pee d USB 2.0 to 10/100 Ethernet Controller Datasheet Revision 1.7 (10-02-08) 42 SMSC LAN9500/LAN9500i DA T ASHEET Chapter 6 Revision History T able 6.1 Customer Revision History REVISION LEVEL AND DATE SECTION/FIGUR E/ENTRY CORRECTION Rev . 1.6 (09-09-08 ) All Fixed various typos T able 3.
Hi-S peed USB 2.0 to 1 0/100 Ethernet Controller Datasheet SMSC LAN9500/LAN9500i 43 Revision 1.7 (10-02-08) DA T ASHEET T abl e 2.4, “Miscellaneous Pins,” o n pag e 14 Added new TEST3 entry , which must always be grounded. Modified buffer types for TEST1 an d TEST2 entrie s to indicate “-” as buffe r type.
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