Gebruiksaanwijzing /service van het product MBD-X8DTI-LN4F-O van de fabrikant Supermicro
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X8DT3 X8DT i USER’S MANUAL Revision 1.2a X8DT3-F X8DT i-F X8DT i-LN4F X8DT3-LN4F.
Unless you request and receive written permission from Super Micro Computer , Inc., you may not copy any part of this document. Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders.
Preface About this Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the X8DT3/ X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F motherboard.
Conventions Used in the Manual Special attention should be given to the following symbols for proper installation and to prevent damage done to the components or injury to yourself: Danger/Caution: Instructions to be strictly followed to prevent catastrophic system failure or to avoid bodily injury .
Contacting Supermicro v Contacting Supermicro Headquarters Address: Super Micro Computer , Inc. 980 Rock A ve. San Jose, CA 95131 U.S.A. T el: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: marketing@supermicro.com (General Information) support@supermicro.
X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual vi T able of Contents Preface Chapter 1 Introduction 1-1 Overview ......................................................................................................... 1-1 1-3 Chipset Overview .
T able of Contents vii Chassis Intrusion ..................................................................................... 2-23 Internal Speaker ....................................................................................... 2-24 Power LED/Speaker .
X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual viii 3-3 Frequently Asked Questions ........................................................................... 3-3 3-4 Returning Merchandise for Service...........................
Chapter 1: Introduction 1-1 Chapter 1 Introduction 1-1 Overview Checklist Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry . Supermicro boards are designed with the utmost attention to detail to provide the highest standards in quality and performance.
1-2 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual X8DT3/X8DTi/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F Image Note: The drawings and pictures shown in this manual were based on the latest PCB Revision available at the time of publishing of the manual.
Chapter 1: Introduction 1-3 J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
1-4 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Jumpers not indicated are for test purposes only. 1. For IPMI con fi guration, 2. please refer to the Winbond BMC User's Guide posted on our website @ http://www .supermicro.
Chapter 1: Introduction 1-5 Quick Reference Jumper Description Default Setting JBT1 CMOS Clear (See Section 5-10) JI 2 C1/JI 2 C2 SMB to PCI Slots 2-3 (Disabled) JPB BMC Enable (for F models) Pins 1-2 (Enabled) (for R.
1-6 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Motherboard Features CPU T wo Intel • ® 5500/5600* Series (LGA 1366) processors, each processor support- ing two full-width Intel QuickPath Interconnect links with a total of up to 51.
Chapter 1: Introduction 1-7 Sys tem re so urc e al er t via S upe ro D oc tor I II • ACPI Features Slow blinking LED for suspend state indicator • Mai n s wit ch o ve rride m echa nism • AC PI P.
1-8 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Block Diagram of the 5520 Platform Note: This is a general block diagram. Please see the previous Mother- board Features pages for details on the features of each motherboard. PCI-33 PCI-E X8 LANE6 COM2 internal #4 #5 PCI-E X8 USB 2.
Chapter 1: Introduction 1-9 1-3 Chipset Overview Bui lt upo n th e ca pabi lit y of t he Inte l 552 0 plat fo r m, the X8 DT3 / X8 DTi/ X8DT3 - F/ X8 DTi - F / X8 DT3 - LN 4F/ X8DT i- LN 4F mot he rb .
1-10 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual 1-4 Special Features Recovery from AC Power Loss BIOS provides a setting for you to determine how the system will respond when AC power is lost and then restored to the system.
Chapter 1: Introduction 1-1 1 e n v i r o n m e n t o r u s e d w i t h S u p e r o D o c t o r I I i n L i n u x . S u p e r o D o c t o r i s u s e d t o not if y t he u ser o f ce r t ain sy stem even ts.
1-12 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual (WOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has WOL capability . In addition, an onboard LAN controller can also support WOL without any connection to the WOL header .
Chapter 1: Introduction 1-13 ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and a processor interrupt system. Both UARTs provide legacy speed with baud rate of up to 115.
1-14 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Notes.
Chapter 2: Installation 2-1 Chapter 2 Installation 2-1 Static-Sensitive Devices Electrostatic Discharge (ESD) can damage electronic com ponents. T o prevent dam- age to your system board, it is important to handle it very carefully . The following measures are generally suf fi cient to protect your equipment from ESD.
2-2 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual T ools Needed 1. Phillips Screwdriver 2. Pan head #6 screws Installation Instructions Install the IO shield into the chassis. 1. Locate the mounting holes on the motherboard. Refer to the layout above for 2.
Chapter 2: Installation 2-3 2-3 Processor and Heatsink Installation When handling the processor package, avoid placing direct pressure on the label area of the fan. Notes: Always connect the power cord last and always remove it before adding, re- 1. moving or changing any hardware components.
2-4 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Socket Keys After removing the plastic cap, 1. using your thumb and the index fi nger , hold the CPU at the north and south center edges. Align the CPU key , the semi- 2. circle cutout, against the socket key , the notch below the gold color dot on the side of the socket.
Chapter 2: Installation 2-5 Installing a CPU Heatsink Screw#1 Screw#2 Do not apply any thermal 1. grease to the heatsink or the CPU die because the required amount has already been ap- plied. Screw#1 Screw#2 Install Screw#1 Place the heatsink on top of the 2.
2-6 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Removing the Heatsink War ni ng: W e d o not re co mm end t hat th e CPU o r the h eat sink b e re - m o v e d .
Chapter 2: Installation 2-7 2-4 Memory Installation Note : Chec k the S upe r mic ro we b site fo r re co mme nde d me mor y mo dul es. CAUTI O N E x e r ci s e e xt r e m e c ar e wh e n in s ta l l i n g o r r e m o v i n g D I MM mo dul es to p revent any po ss ibl e dam age.
2-8 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Memory Population for Optimal Performance -For a motherboard with One CPU (CPU1) installed Branch 0 Branch 1 Branch 2 3 DIMMs.
Chapter 2: Installation 2-9 UDIMM Population for the Motherboard w/5500 Processors Installed DIMM Slots per Channel DIMMs Populated per Channel DIMM T ype (Unb.= Unbuffered) Speeds (in MHz) Ranks per DIMM (Mixing: any combination; SR=Single Rank, DR=Dual Rank) 2 1 Unb.
2-10 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual 1.35V DIMMs • 1.35V RDIMM Population for the Motherboard w/5600 Processors Installed DIMM Slots per Channel DIMMs Populated per Channel DIMM T ype (Reg.=Registered) Speeds (in MHz) Ranks per DIMM (any combination; SR=Single Rank, DR=Dual Rank, QR=Quad Rank) 2 1 Reg.
Chapter 2: Installation 2-1 1 Possible System Memory Allocation & A vailability System Device Size Physical Memory Remaining (-Available) (4 GB T otal System Memory) Firmware Hub fl ash memory (System BIOS) 1 MB 3.99 GB Local APIC 4 KB 3.99 GB Area Reserved for the chipset 2 MB 3.
2-12 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual X8DT3/i Series Rev. 2.01 2-5 Control Panel Connectors/IO Ports Th e I/O p or ts ar e c ol or c od ed in c o nfor m anc e wi th t he PC 9 9 s pec i fi cat ion . See th e pic tu re be low f or t he c ol or s and l oc at io ns of t he var io us I /O po r t s.
Chapter 2: Installation 2-13 A TX PS/2 Keyboard and PS/2 Mouse Ports The A TX PS/2 keyboard and PS/2 mouse are located next to the Back Panel USB Ports 0~1 on the moth- erboard.
2-14 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual X8DT3/i Series Rev. 2.01 2 1. Backpanel USB 0 2. Backpanel USB 1 3. Front Panel USB 2 4. Front Panel USB 3 5. Front Panel USB 4/5 6. Front Panel USB 6/7 Universal Serial Bus (USB) T wo Universal Serial Bus ports (USB 0 and USB 1) are located on the I/O back panel.
Chapter 2: Installation 2-15 X8DT3/i Series Rev. 2.01 Serial Ports T wo COM connections (COM1 & COM2) are located on the motherboard. COM1 is located on the Backplane IO panel. COM2 is located next to the onboard battery to provide additional onboard serial connection support.
2-16 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual X8DT3/i Series Rev. 2.01 1. LAN1 2. LAN2 3. LAN3 (X8DT3/i-LN4F only) 4. LAN4 (X8DT3/i-LN4F only) 5. LAN5 (X8DT3/i-F/-LN4F only) 1 2 1 2 3 4 3 4 Ethernet Ports T wo Ethernet ports (LAN 1/LAN2) are located at on the IO backplane.
Chapter 2: Installation 2-17 X8DT3/i Series Rev. 2.01 2. Front Control Panel JF1 contains header pins for various buttons and indicators that are normally lo- cated on a control panel at the front of the chassis. These connectors are designed speci fi cally for use with Supermicro server chassis.
2-18 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Power LED Th e Power LED c o nne ct io n is lo c ated o n p i n s 1 5 a n d 1 6 o f J F1. R e f e r t o t h e ta ble o n th e ri ght f or pi n de fi nitions. NMI Button The non-maskable interrupt button header is located on pins 19 and 20 of JF1.
Chapter 2: Installation 2-19 Po wer Bu tton OH/Fan Fail LED 1 NIC1 L ED Re s e t Butt on 2 HDD LED Po we r LED Reset PWR Vcc Vcc Vcc Vcc Gr ound Gr ound 19 20 Vcc X Gr ound NMI X Vcc PWR Fail LED NIC2.
2-20 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Po wer Bu tton OH/Fan Fail LED 1 NIC1 L ED Re s e t Butt on 2 HDD LED Po we r LED Reset PWR Vcc Vcc Vcc Vcc Gr ound Gr ound .
Chapter 2: Installation 2-21 Po wer Bu tton OH/Fan Fail LED 1 NIC1 L ED Re s e t Butt on 2 HDD LED Po we r LED Reset PWR Vcc Vcc Vcc Vcc Gr ound Gr ound 19 20 Vcc X Gr ound NMI X Vcc PWR Fail LED NIC2 LED Power Button The Power Button connection is located on pins 1 and 2 of JF1.
2-22 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
Chapter 2: Installation 2-23 J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
2-24 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
Chapter 2: Installation 2-25 J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
2-26 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
Chapter 2: Installation 2-27 J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
2-28 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual A.TPM Header B. DOM PWR TPM Header A Trusted Platform Module header (JTPM1) is located next to COM2 port to provide TPM support for system data security . See the table on the right for pin de fi nitions.
Chapter 2: Installation 2-29 J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
2-30 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
Chapter 2: Installation 2-31 J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
2-32 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
Chapter 2: Installation 2-33 BMC Enable Jumper JPB allows you to enable or disable embedded the WPCM 450 BMC Controller (Baseboard Manage- ment Controller) to support IPMI 2.O on theX8DT3/i-F/LN4F . The default set- ting is Open to enable the connection.
2-34 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
Chapter 2: Installation 2-35 J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
2-36 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
Chapter 2: Installation 2-37 J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
2-38 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual J5 T-SGPIO2 T-SGPIO1 JLAN2 JLAN1 JF1 1 COM2 JWOL Battery JSM1 JSM2 JBT1 JUSB2 JUSB3 1 BMC/VGA CTRL JPG1 JPL1 JPL2 JWD JPS1 JI2C2 JI2C1 D1 LE1 LES2 J6 JD1 SP1 JOH1 JL1 JPS2 JPW3 JPW1 JPW2 1 X8DT3/i Series BIOS LAN3 LAN1 LAN2 VGA Slot6 PCI-E 2.
3-1 Chapter 3: T roubleshooting Chapter 3 T roubleshooting 3-1 T roubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘T echnical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter .
3-2 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Use the speaker to determine if any beep codes exist. Refer to Appendix A 2. for details on beep codes. Losing the System’ s Setup Con fi guration Make sure that you are using a high quality power supply .
3-3 Chapter 3: T roubleshooting users, so it is best to fi rst check with your distributor or reseller for troubleshooting services. They should know of any possible problem(s) with the speci fi c system con fi guration that was sold to you. Please go through the ‘T roubleshooting Procedures’ and 'Frequently Asked 1.
3-4 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual BIOS before downloading. Y ou can choose from the zip fi le and the .exe fi le. If you choose the zip BIOS fi le, please unzip the BIOS fi le onto a bootable USB device. Run the batch fi le using the format fl ash.
Chapter 4: AMI BIOS 4-1 Chapter 4 BIOS 4-1 Introduction This chapter describes the AMI BIOS Setup Utility for the X8DT3/X8DT i/X8DT3- LN4/X8DT i-LN4. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily updated. This chapter describes the basic navigation of the AMI BIOS Setup Utility setup screens.
4-2 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual How T o Change the Con fi guration Data The con fi guration data that determines the system parameters may be changed by entering the AMI BIOS Setup utility . This Setup utility can be accessed by pressing <Del> at the appropriate time during system boot.
Chapter 4: AMI BIOS 4-3 System Overview: The following BIOS information will be displayed: System Time/System Date Use this option to change the system time and date. Highlight System Time or Sys- tem Date using the arrow keys. Enter new values through the keyboard and press <Enter>.
4-4 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual 4-3 Advanced Setup Con fi gurations Use the arrow keys to select Boot Setup and press <Enter> to access the submenu items: Boot Features Quick Boot If Enabled, this option will skip certain tests during POST to reduce the time needed for system boot.
Chapter 4: AMI BIOS 4-5 Hit 'Del' Message Display Se lec t Ena ble d to di spl ay "P res s D EL to r un Set up" du ri ng PO ST . The options are Enabled and Disabled. Interrupt 19 Capture Interrupt 19 is the software interrupt that handles the boot disk function.
4-6 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual C1E Support Select Enabled to enable Enhanced Halt State support. C1E signi fi cantly reduces the CPU's power consumption by reducing the CPU's clock cycle and voltage during a "Halt State.
Chapter 4: AMI BIOS 4-7 Intel AES-NI (A vailable when supported by the OS and the CPU) If set to Enabled, Intel AES-NI will add new encryption features to help accelerate AES SW application, providing code authorization and signature veri fi cation to enhance system security .
4-8 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual C3 Auto Demotion When this item is set to enabled, the CPU will conditionally demote C6 or C7 re- quests to C3 based on un-core auto-demote information. The options are Disabled and Enabled.
Chapter 4: AMI BIOS 4-9 Demand Scrubbing This is a memory error-correction scheme that allows the processor to write cor- rected data back into the memory block from where it was read by the processor .
4-10 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Intel VT -d Select Enabled to enable Intel's Virtualization T echnology support for Direct I/O VT -d by reporting the I/O device assignments to VMM through the DMAR ACPI T ables.
Chapter 4: AMI BIOS 4-1 1 Reserved Page Rout Select PCI to use the PCI communication mode for the USB connections. Select LPC to use the LPC mode for the USB connections.
4-12 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Block (Multi-Sector T ransfer) Block Mode boosts the IDE drive performance by increasing the amount of data transferred. Only 512 bytes of data can be transferred per interrupt if Block Mode is not used.
Chapter 4: AMI BIOS 4-13 UDMA5 Ultra DMA 5 100 MB/s UDMA 6 Ultra DMA 6 133 MB/s S.M.A.R.T . For Hard disk drives Self-Monitoring Analysis and Reporting T echnology (SMART) can help predict impending drive failures. Select Auto to allow the AMI BIOS to automatically de- tect hard disk drive support.
4-14 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Express devices in order to enhance network connectivity and performance. The options are Enabled and Disabled .
Chapter 4: AMI BIOS 4-15 Serial Port3 Address This option speci fi es the base I/O port address and the Interrupt Request address of Serial Port 3. Select Disabled to prevent the serial port from accessing any system resources. When this option is set to Disabled, the serial port physically becomes unavailable.
4-16 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual VT -UTF8 Combo Key Support Select Enabled to use VT -UTF8 Combo as the keyboard type to send commands from a remote console.
Chapter 4: AMI BIOS 4-17 CPU1 T emperature/CPU2 T emperature The CPU thermal technology that reports absolute temperatures (Celsius/Fahr- enheit) has been upgraded to a more advanced feature by Intel in its newer processors. The basic concept is each CPU is embedded by unique temperature information that the motherboard can read.
4-18 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual System T emperature : Th e syste m temp erat ure w ill b e disp layed (i n de gre es in Ce lsi us an d F ahr enhe it) as it is de tec ted by th e BIO S. V oltage Monitoring CPU1 Vcore/CPU2 Vcore, CPU1 DIMM/CPU2 DIMM, 1.
Chapter 4: AMI BIOS 4-19 APIC ACPI SCI IRQ If set to Enabled, APIC ACPI SCI IRQ is supported by the system. The options are Enabled and Disabled . Headless Mode Select Enabled to use the system to function without a keyboard, monitor and/or mouse. The options are Enabled and Disabled .
4-20 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual TPM Owner Status This item displays the status of TPM Ownership. IPMI Con fi guration Intelligent Platform Management Interface (IPMI) is a set of common interfaces that IT administrators use to monitor system health and to manage the system as a whole.
Chapter 4: AMI BIOS 4-21 Clear BMC System Event Log Clear BMC System Log Select OK and press the <Enter> key to clear the BMC system log. Select Cancel to keep the BMC System log. The options are OK and Cancel. Caution : Any cleared information is unrecoverable.
4-22 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual IP Address This item displays the IP address of this computer . The value of each three-digit number separated by dots should not exceed 255. Current IP Address in BMC This item displays the current IP address used for your IPMI connection.
Chapter 4: AMI BIOS 4-23 Mac Address BIOS will automatically enter your system's Mac address; however it may be over- ridden. Mac addresses are 6 two-digit hexadecimal numbers (Base 16, 0 ~ 9, A, B, C, D, E, F) separated by dots. (i.e., 00.30.48.
4-24 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Supervisor Password This item indicates if a Supervisor password has been entered for the system. "Not Installed" means a Supervisor password has not been used. User Password This item indicates if a user password has been entered for the system.
Chapter 4: AMI BIOS 4-25 Boot Device Priority Use this feature to specify the sequence of Boot Device Priority The settings are 1st boot device ~ 5th boot device and Disabled. Hard Disk Drives Use this feature to specify the boot sequence from all available hard disk drives.
4-26 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual 4-6 Exit Options Select the Exit tab from the AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen.
A-1 Appendix A: BIOS POST Error Codes Appendix A BIOS Error Beep Codes During the POST (Power-On Self-T est) routines, which are performed each time the system is powered on, errors may occur . Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
A-2 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Notes.
Appendix B: Software Installation Instructions B-1 Appendix B Software Installation Instructions B-1 Installing Software Programs After you've installed the Windows Operating System, a screen as shown below will appear . Y ou are ready to install software programs and drivers that have not yet been installed.
B-2 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Supero Doctor III Interface Display Screen-I (Health Information) B-2 Con fi guring Supero Doctor III The Supero Doctor III program is a web-based management tool that supports remote management capability .
Appendix B: Software Installation Instructions B-3 Supero Doctor III Interface Display Screen-II (Remote Control) Note : SD III S of t wa re Revi sio n 1 .0 c a n be dow nl oad ed f rom o ur Web site at : f tp:// f tp. supe r mic ro.c om /ut ilit y/ Supe ro _ D oc to r_I II/ .
B-4 X8DT3/X8DT i/X8DT3-F/X8DT i-F/X8DT3-LN4F/X8DTi-LN4F User's Manual Notes.
(Disclaimer Continued) The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, .
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