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ADS5525/27/45/46/47 EVM User Guide User's Guide November 2006 SLWU028B.
2 SLWU028B – January 2006 – Revised November 2006 Submit Documentation Feedback.
Contents 1 Overview .................................................................................................................... 5 1.1 EVM Basic Functions ........................................................................................
List of Figures 1 ADS5547 SNR Performance vs Decoupling ............................................................................. 8 2 THS4509 + ADS5545 EVM Performance ...............................................................................
1 Overview 1.1 EVM Basic Functions User's Guide SLWU028B – January 2006 – Revised November 2006 This manual assists users in using the ADS5525/27/45/46/47 evaluation module (EVM) for evaluating the performance of the ADS5525/27/45/46/47 (ADCs).
www.ti.com 2 EVM Quick Start Guide 2.1 EVM LVDS Output Mode Quick Start (Default) 2.2 EVM CMOS Output Mode Quick Start EVM Quick Start Guide The ADC has two basic modes of output operation, ensuring compatibility in a broad range of systems.
www.ti.com 3 Circuit Description 3.1 Schematic Diagram 3.2 Circuit Function 3.2.1 Configuration Options 3.2.2 Power Circuit Description The schematic diagram for the EVM is in Section 5.3 of this document. The following paragraphs describe the function of individual circuits.
www.ti.com f IN − Input Frequency − MHz SNR − Signal-to-Noise Ratio − dBFS G001 9.97 19.94 30.13 40.33 50.13 60.13 69.59 79.87 89.75 100.33 130.13 170.13 68 69 70 71 72 73 74 1 Decoupling Cap Baseline-All Decoupling Caps 3.2.3 Analog Inputs Circuit Description Table 2.
www.ti.com 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 f − Frequency − MHz Amplitude − dBFS G002 1 −135 −120 10 −130 −1 10 −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 2 3 4 5 x 3.
www.ti.com Circuit Description Table 3. Output Connector J4 J4 PIN ADS5525/27 DESCRIPTION ADS5545/46/47 DESCRIPTION 1 CLK CLK 2 GND GND 3 NC NC 4 GND GND 5 Reserved Reserved 6 GND GND 7 Reserved Reser.
www.ti.com C001 3.2.6 Test Points Circuit Description Figure 3. Eye Diagram of Data on Header J4. For added EVM visibility and control, several test points are provided.
www.ti.com 3.2.7 LED Operation Circuit Description Table 4. Test Points TP DESCRIPTION TP1 ADC common mode, input or output depending on the setting of SW1, switch 4 TP3 THS4509 power down TP4 ADC output enable TP5 AGND TP6 AGND TP7 AGND TP8 DGND TP9 FPGA M0 pin; determines which FPGA logic file to load TP10 ADC SCLK TP11 TPS75003 1.
www.ti.com 4 Expansion Options 4.1 Custom FPGA Code 4.2 Expansion Slot 4.3 Optional USB SPI Interface Expansion Options The EVM offers several exciting possibilities to expand the capabilities of the EVM.
www.ti.com 5 Physical Description 5.1 PCB Layout K001 Physical Description This chapter describes the physical characteristics and PCB layout of the EVM. The EVM is constructed on a 6-layer, 0.062-inch thick PCB using FR-4 material. The individual layers are shown in Figure 4 through Figure 9 .
www.ti.com K002 Physical Description Figure 5. Layer 2, Ground Plane SLWU028B – January 2006 – Revised November 2006 15 Submit Documentation Feedback.
www.ti.com K003 Physical Description Figure 6. Layer 3, Power Plane #1 16 SLWU028B – January 2006 – Revised November 2006 Submit Documentation Feedback.
www.ti.com K004 Physical Description Figure 7. Layer 4, Power Plane #2 SLWU028B – January 2006 – Revised November 2006 17 Submit Documentation Feedback.
www.ti.com K005 Physical Description Figure 8. Layer 5, Ground Plane 18 SLWU028B – January 2006 – Revised November 2006 Submit Documentation Feedback.
www.ti.com K006 Physical Description Figure 9. Layer 6, Bottom Layer SLWU028B – January 2006 – Revised November 2006 19 Submit Documentation Feedback.
www.ti.com 5.2 Bill of Materials Physical Description 20 SLWU028B – January 2006 – Revised November 2006 Submit Documentation Feedback.
www.ti.com Physical Description Table 5. Bill of Materials NOT VALUE FOOTPRINT QTY PART NUMBER VENDOR DIGI-KEY NUMBER REF DESIGNATOR INSTALLED CAPACITORS 47- µ F, tantalum, 20%, 10-V 7343 4 ECS-T1AD4.
www.ti.com Physical Description Table 5. Bill of Materials (continued) NOT VALUE FOOTPRINT QTY PART NUMBER VENDOR DIGI-KEY NUMBER REF DESIGNATOR INSTALLED RESISTORS 0- Ω , 1/10-W, 5% 603 7 ERJ-3GEY0R00V Panasonic P0.0GCT-ND R5, R6, R10, R18, R54, R56 R48, R58, R82 0- Ω , 1/10-W, 5% 402 3 ERJ-GE0R00X Panasonic P0.
www.ti.com Physical Description Table 5. Bill of Materials (continued) NOT VALUE FOOTPRINT QTY PART NUMBER VENDOR DIGI-KEY NUMBER REF DESIGNATOR INSTALLED FERRITE BEADS, CONNECTORS, JUMPERS, JACKS, ICs, ETC. Ferrite bead 1206 5 EXC-ML32A680U Panasonic P10437CT-ND FB2, FB3, FB4, FB6, FB8, FB9, FB7 FB10 Inductor, SMT, 15- µ H, 2.
www.ti.com Physical Description Table 5. Bill of Materials (continued) NOT VALUE FOOTPRINT QTY PART NUMBER VENDOR DIGI-KEY NUMBER REF DESIGNATOR INSTALLED ADS5525/27, ADS5545/46/47 48-QFN_MOD 1 ADS552.
www.ti.com 5.3 PCB Schematics Physical Description The schematics for the EVM are on the following pages. SLWU028B – January 2006 – Revised November 2006 25 Submit Documentation Feedback.
A B C D D C B A ti 12500 TI Boulevard. Dallas, Texas 75243 Title: SHEET: OF: FILE: SIZE: DATE: REV: 11-Jul-2006 Drawn By: Engineer: C4 .1uF C5 .1uF CLKM CLKP CLKP CLKM ADS5545 B 17 J. VENABLE Y. DEWONCK C10 .1uF + C9 10uF + C8 10uF AVDD DRVDD C6 .1uF C7 .
1234 56 A B C D 6 5 4 3 2 1 D C B A FILE: Drawn By: Engineer: ti 12500 TI Boulevard. Dallas, Texas 75243 Title: SHEET: OF: SIZE: DATE: REV: 17-Jul-2006 DOCUMENTCONTROL # 1 2 3 4 5 J3 AIN R34 49.9 R38 4.02 R37 4.02 INP INM INP INM ADS5545 B 27 J. VENABLE Y.
1234 56 A B C D 6 5 4 3 2 1 D C B A FILE: Drawn By: Engineer: ti 12500 TI Boulevard. Dallas, Texas 75243 Title: SHEET: OF: SIZE: DATE: REV: 11-Jul-2006 DOCUMENTCONTROL # ADS5545 B 37 J. VENABLE Y. DEWONCK Note 1. Part not installed 1 2 3 4 5 J7 CLK_INP 1 2 3 4 5 J8 CLK_INM R59 49.
1234 56 A B C D 6 5 4 3 2 1 D C B A FILE: Drawn By: Engineer: ti 12500 TI Boulevard. Dallas, Texas 75243 Title: SHEET: OF: SIZE: DATE: REV: 11-Jul-2006 DOCUMENTCONTROL # ADS5545 B 47 J.
1234 56 A B C D 6 5 4 3 2 1 D C B A FILE: Drawn By: Engineer: ti 12500 TI Boulevard. Dallas, Texas 75243 Title: SHEET: OF: SIZE: DATE: REV: 11-Jul-2006 DOCUMENTCONTROL # ADS5545 B 57 J. VENABLE Y. DEWONCK Note 1. Part not installed 2.5V 1.2V 1 2 3 4 5 6 JP1 6X1X.
1234 56 A B C D 6 5 4 3 2 1 D C B A ti 12500 TI Boulevard. Dallas, Texas 75243 Title: SHEET: OF: FILE: SIZE: DATE: REV: 11-Jul-2006 Drawn By: Engineer: ADS5545 B 67 J.
1234 56 A B C D 6 5 4 3 2 1 D C B A FILE: Drawn By: Engineer: ti 12500 TI Boulevard. Dallas, Texas 75243 Title: SHEET: OF: SIZE: DATE: REV: 11-Jul-2006 DOCUMENTCONTROL # C33 .1uF AVDD ADC Analog Supply (+3.3V) C36 .1uF +3.3VA-PS ADS5545 B 5V 77 J11 RED J9 BLACK FB2 J14 RED J17 BLACK + C70 10uF + C65 47uF C32 .
www.ti.com Physical Description EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for .
www.ti.com Physical Description FCC Warning This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use.
IMPORTANT NOTICE Texas Instruments Incorporated an d its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improveme nts, and other changes to its products a nd services at any time and to discontinue any product or s ervice without notice.
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