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1998 Mixed-Signal Linear Products User ’ s Guide.
Printed in U.S.A. 07/98 SL VU001A.
SL VP089 Synchronous Buck Converter Evaluation Module User ’ s Guide Printed on Recycled Paper Literature Number: SL VU001A July 1998.
IMPORT ANT NOTICE T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify , before placing orders, that information being relied on is current and complete.
Related Documentation From T exas Instruments iii Read This First Preface Read This First About This Manual This user ’ s guide is a reference manual for the SL VP089 Synchronous Buck Converter Evaluation Module used to evaluate the performance of the TL5001 PWM Controller .
If Y ou Need Assistance iv If Y ou Need Assistance . . . If you want to . .. Contact T exas Instruments at . . . Visit TI online World Wide W eb: http://www .
Running Title — Attribute Reference v Chapter Title — Attribute Reference Contents 1 Hardware 1-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Introduction 1-2 .
Running Title — Attribute Reference vi Figures 1 – 1 T ypical Synchronous Buck Converter 1-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 – 2 Schematic Diagram 1-4 . . . . . . . . . . . . . . . . . . .
1-1 Chapter Title — Attribute Reference Hardware The SL VP089 Synchronous Buck Converter Evaluation Module (SL VP089) provides a method for evaluating the performance of the TL5001 pulse-width- modulation (PWM) controller . The device contains all of the circuitry necessary to control a switch-mode power supply in a voltage-mode configuration.
Introduction 1-2 1.1 Introduction Synchronous buck converters provide the smaller size and higher efficiency required by electronic equipment, particularly portable battery-operated equipment. The synchronous buck converter reduces power losses associated with a standard buck converter by substituting a power MOSFET for the commutating diode.
Schematic 1-3 Hardware 1.2 Schematic Figure 1 – 2. Schematic Diagram DTC COMP R9 RT OUT SCP GND V CC 6 3 4 7 R9 1 5 FB + C1 µ 1F R2 C3 0.0022 µ F C2 0.033 µ F R8 C9 0.22 µ F C15 µ 1.0 F R6 2 8 U1 TL5001 1IN 2OUT GND V CC 2 4 5 7 2IN 3 1OUT V DD REG 8 6 1 R10 R13 IRF7201 NMOS Q2 U2 TPS2812 C14 0.
Input/Output Connections 1-4 1.3 Input/Output Connections Figure 1 – 3 shows the input/output connections to the SL VP089. Figure 1 – 3. Input/Output Connections C5 Q1 Q2 TL5001 +3.
Board Layout 1-5 Hardware 1.4 Board Layout Figure 1 – 4 shows the SL VP089 board layout. Figure 1 – 4. Board Layout C5 Q1 Q2 TL5001 +3.3V , 3 AMP SYNC.
Bill of Materials 1-6 1.5 Bill of Materials T able 1 – 1 lists materials required for the SL VP089. T able 1 – 1. Bill of Materials Qty Reference Part Number Mfr Description 1 C1 ECS-T1CY105R Panasonic Capacitor , T ant, 1 F , 20%, A Case 1 C1 1 Standard Capacitor , Cer , 0.
T est Results 1-7 Hardware 1.6 T est Results T ables 1 – 2 and 1 – 3, along with Figures 1 – 5 through 1 – 8, show the test results for the SL VP089. T able 1 – 2. Line/Load Regulation, 3.3-V (T otal V ariation) Line/Load 0.3 A 0.9 A 1.5 A 3.
T est Results 1-8 Figure 1 – 6. Power Switch T urn-On and Delay from Q2 Off V CC = 12 V I O = 1.5 A Q1 DRAIN 5 V/DIV Q2 GA TE 5 V/DIV 20 ns/Div 1 2 Figure 1 – 7.
T est Results 1-9 Hardware Figure 1 – 8. Inductor and Output Ripple V CC = 12 V I O = 1.5 A Inductor Ripple 1 A/Div Output Ripple 20 mV/Div 2 µ s/Div 1 – DC 2 – AC.
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2-1 Chapter Title — Attribute Reference Design Procedure There are many possible ways to proceed when designing power supplies. This chapter shows the procedure used in the design of the SL VP089. The chapter includes the following topics: T opic Page 2.
Introduction 2-2 2.1 Introduction The SL VP089 is a dc-dc synchronous buck converter module that provides a 3.3-V output at up to 3 A with an input voltage range of 5.5 V to 12 V . The PWM controller is a TL5001 operating at a nominal frequency of 100 kHz.
Operating Specifications 2-3 Design Procedure 2.2 Operating Specifications T able 2 – 1 lists the operating specifications for the SL VP089. T able 2 – 1. Operating Specifications Specification Min Ty p Max Units Input V oltage Range 5.5 12 V Output V oltage Range 3.
Design Procedures 2-4 2.3 Design Procedures Detailed steps in the design of a buck-mode converter may be found in Designing With the TL5001C PWM Controller (literature number SL V A034) from TI. This section shows the basic steps involved in this design.
Design Procedures 2-5 Design Procedure The power dissipation (conduction + switching losses) can be approximated as: P D I 2 O r DS ( ON ) D 0.5 V I I O t r f f Assuming total switching time, t r+f , = 100 ns, a 55 ° C maximum ambient tem- perature, and r DS(ON) adjustment factor = 1.
Design Procedures 2-6 2.3.6 Controller Functions The controller functions, oscillator frequency , soft-start, dead-time-control, short-circuit protection, and sense-divider-network are discussed in this sec- tion. The oscillator frequency is set by selecting the resistance value from the graph in figure 6 of the TL5001 data sheet.
Design Procedures 2-7 Design Procedure Calculating the pulse-width-modulator gain as the change in output voltage divided by the change in PWM input voltage gives: A PWM V O V COMP 9 – 0 1.3 – 0.65 13.85 22.8 db The LC filter has a double pole at: 1 2 LC 1 2 21.
Design Procedures 2-8 Figure 2 – 2. Compensation Network _ + C4 R3 R4 C3 C2 R2 V ref V O V I The transfer function for this circuit is: V O V I [1 sR 2 (C 2 C 3 )] [ 1 sC 4 (R 3 R 4)] sC 2 R 4 [ 1 sC 3 R 2 ][ 1 sC 4 R 3] f Z1 f Z2 f P1 f P2 f P 3 The desired output regulation is ± 6 percent total deviation.
Design Procedures 2-9 Design Procedure Figure 2 – 3 shows the bode plot for the compensation network. Figure 2 – 3. Bode Plot 25 20 10 0 Gain – dB (Solid) 30 40 Frequency – Hz 45 35 15 90 70 5.
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