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TECHNICAL TRAININ G MAN U AL N5SS CHASSIS NTDPJTV05 TW40F80 P R OJECTION TELEVISION Only the di f ferent points from the training manual “N5SS chassis” with its f ile No. 026-9506 are described on this manual. F or other parts common with “N5SS chassis”, please refer to the original manual with its f ile No.
Contents SECTION I: OUTLINE ................................................................................................ 6 1. FEA TURE ................................................................................................................
SECTION V : W A C CIRCUIT .................................................................................... 37 1. OUTLINE .................................................................................................................. 37 2. CIRCUIT OPERA TION .
SECTION X: DEFLECTION DISTOR TION CORRECTION CIRCUIT (SIDE DPC CIRCUIT) ............................................................................................... 82 1. DEFLECTION DISTO R TION CORRECTION IC (T A8859CP) ....................... 82 2.
5 2. MERITS OF BUS SYSTEM 2-1. Improved Ser viceability Most of the adjustments previously made by r esetting vari- able resistors and/or capacitors can be made on the ne w chas- sis by operating the remote control and seeing the results on the TV screen.
6 C-Chassis Model TW56F80 TW40F80 TP61F90 TP61F80 TP55F80 TP55F81 TP50F90 TP50F60 TP50F61 TP50F50 TP50F51 CRT 7" 7" 7" 7" 7" 7" 7" 7" 7" 7" 7" CRT Source Hitach Hitach Hitach Hitach Hitach Hitach Hitach Hitach Hitach Hitach Hitach Remote H/U Intell Univ Intell Univ Univ Univ Intell Univ Univ.
7 4. FR ONT VIEW Fig. 1-1 Note: [No] Owner's manual page. POWER DEMO MENU ANT/ VIDEO ENTER VOLUME CHANNEL POWER indicator POWER button Press to open the door.
8 5. REAR VIEW S-VIDEO VIDEO L/MCNO R AUDIO IN-VIDEO 3 VIDEO / AUDIO INPUT jacks (VIDEO 3) S-VIDEO INPUT jack (VIDEO 3) Behind the door TV front Fig. 1-2 EXT SPEAKER EXT INT ANT (75 ½) TV AMP L VIDEO.
9 6. REMO TE CONTROL VIEW ADV/ POP CH ADV/ POP CH 2 3 5 6 8 9 4 7 ¥ 0 ENT PIC -SIZE TV/VIDEO RECALL POWER CH VOL CH RTN EDS MENU FAV FAV EXIT RESET STOP SCURCE PLAY POP REC TV/VCR REW FF CH SEARCH ST.
10 7. CHASSIS LA Y OUT -3 : CRT-D(B) 5 -2 : CRT-D(G) 5 -1 : CRT-D(R) 5 - 6 : SVM 5 FOCUS PACK - 4 : FRONT-LED 5 - 5 : FRONT-CON 5 : POWER 1 6 F.B.T J-BOX To CRT To FOCUS PACK 330 294 : MAIN 1 1pc 330 294 : DEFELECTION 2 1pc 330 294 : CONV / POWER2 3 1pc 249 165 : AV.
11 8. CONSTR UCTION OF CHASSIS A110 A110B 2pcs K601 A520 PP 5x18 4pcs A110A A126 A505 BIDT2 4x12 2pcs A101 A401 A522 BIDT2 4X12 18pcs A517 A353 A517 PBI 4X16 8pcs B202 A351 A512 BIDT2 4x12 6pcs A201 A.
12 1. CIRCUIT BLOCK Fig. 2-1 Block diagram 1-1. Outline (1) RF signals sent from an antenna are con verted into in- termediate frequency band signals (video: 45.75 MHz, audio: 41.25 MHz) in the tuner . (Hereafter, these sig- nals are called IF signals.
13 1-3. A udio Multiplex Demodulation Circuit The sound multiplex composite signal FM-detected in the PIF circuit enters pin 12 of HIC (hybrid IC) in passing through the separation adjustment VR R V2 and amplified.
14 1-4. A.PR O Section (A udio Pr ocessor) The S.PR O section has following functions. (1) W oofer processing (L+R output) (2) High band, low band, balance control (3) Sound volume control, c yclone le vel control (4) Cyclone ON/OFF All these processing are carried out according to the BUS signals sent from a microcomputer .
15 Fig. 2-4 Configura tion of the audio circuit and signal flow are g iv e n in Fig. 2-4 A/V PCB ICV01 VIF+MTS+S.PRO MODULE R L R L L R L R L R L R L R MOTHER TV CHILD TV PIP OUTPUT VIDEO 1 VIDEO 2 VI.
16 2. POP TUNER TUNER SECTION SAW FILTER VIF/SIF CIRCUIT RF AGC AFT OUTPUT VIDEO OUTPUT AUDIO OUTPUT Fig. 2-5 2-1. Outline The POP tuner (EL922L) consists of a tuner and an IF block inte grated into one unit. The tuner recei ves RF signals in- duced on an antenna and de velops an AFT output, video output, and audio output.
17 POP and Double W indow signal p r ocessing (QY03), IC fo r closed caption control (QM01), IC for W A C control (QX01), IC for 3D-YCS (QZ01), IC for A UTOLIVE (QK06). Differences from N5SS chassis are as follo ws; 1. On-screen function inside microcomputer is used.
18 Fig. 3-1 3. MICR OCOMPUTER Microcomputer TMP87CS38N-3320 has 60k b yte of R OM capacity and equipped with OSD function inside. The specification is as follo w . • T ype name : TMP87CS38N-3320 • ROM : 60k byte • RAM : 2k byte • Processing speed : 0.
19 Fig. 3-2 4. MICR OCOMPUTER TERMIN AL FUNCTION TMP87CS38N3320 (QA01) I O O O O O O O I O IO I 0 I I I I O O I I I IO O I I I I O I I O I I 0 O I O O GND P40 (PWM0) P41 (PWM1) P42 (PWM2) P43 (PWM3) P.
20 << MICR OCOMPUTER TERMIN AL N AME AND OPERA TION LOGIC >> No. Terminal Name Function In/Out Logic Remarks 1 GND 0V 2 BAL INPUT BALANCE Out PWM out 3 REM OUT REMOTE CONTROL Out Remote co.
21 5. EEPR OM (QA02) EEPR OM (Non v olatile memory) has function which, in spite of po wer-of f, memorizes the such condition as channel se- lecting data, last memory status, user control and digital pro- cessor data. The capacity of EEPR OM is 8k bits.
22 7. SYSTEM BLOCK DIA GRAM SCL 0 11 SDA 0 12 VSYNC 27 INT4 40 RMT OUT 3 MUTE 4 SP MUTE 5 V.sync pulse Audio mute Speaker mute Remote controller output 6 5 QA02 Memory 24LC08BI/P SDA SCL DATA 25 CLK 2.
23 8. LOCAL KEY DETECTION METHOD Local key detection in the N5SS chassis is carried out b y using analog like method which detects a v oltage appears at local key input ter minals (pins 17 and 18) of the microcom- puter when a key is pushed.
24 9. REMO TE CONTROL CODE ASSIGNMENT Custom codes are 40-BFH (TV set for North U.S.A.) Code Applicable Applicable Conti- Function to remote to TV set nuit y control 50H PIP STILL 51H PIP ON/OFF 52H Do not use.
25 Custom codes are 40-BFH (TV set for North U.S.A.) Code Applicable Conti- Function to TV set nuty D0H D1H D2H Do not use. Old type core power ON D3H D4H D5H D6H D7H PIP VIDEO ADJ.
26 MODELS CN35F90 CN35F95 CX35F70 TW56F80 TW40F80 TP61F90 TP61F80 TP55F80 TP55F81 TP50F90 TP50F60 TP50F61 D7 0 0 1 0 1 0 0 0 0 0 1 1 D6 * * * * * * * * * * * * D5 0 0 0 0 0 0 0 0 0 0 0 0 D4 0 0 1 0 1 .
27 10. ENTERING T O SER VICE MODE 1. PR OCEDURE (1) P ress once MUTE ke y of remote hand unit to indicate MUTE on screen. (2) Press again MUTE k ey of remote hand unit to kee p pressing until the next procedure. (3) In the status of abov e (2), wait for disappearing of in- dication on screen.
28 13. F AILURE DIA GNOSIS PROCEDURE Model of N5SS chassis is equipped with self diagnosis func- tion inside for trouble shooting. 13-1. Contents to be Confirmed by Customer Contents of self diagnosis Contents of self diagnosis < Countermeasure in case that phonomenon alw ays arises > B.
29 13-4. Understanding Self Diagnosis Indication In case that phenomenon always arises. See Fig. 3-7 . (Example of screen display) SELF CHECK Part coce of QA01 Number of operation of power protection circuit Short check of bus line Communication check of busline NO.
30 13-4-1. Clearing method of self diagnosis r esult In the error count state of screen, press “CHANNEL DOWN” button on TV set pressing “DISPLA Y” button on r emote unit. CA UTION: All ways keep the follo wing caution, in the state of service mode screen.
31 14. TROUBLESHOO TING CHAR T 14-1. TV does Not T urned ON TV does not turned on. Relay sound Check of voltage at pin 7 of QA01 (DC 5V). 8MHz oscillation waveform at pin 32 of QA01. Pulse output at pins 37 and 38 of QA01. Check relay driving circuit.
32 14-2. No Acception of KEY -IN 14-3. No Picture (Snow Noise) NG OK No picture Voltage at pins of +5V, and 32V. Check H001. Check tuner power circuit. Key on TV Voltage change at pins 17, 18 of QA01 (5V to 0V). Replace QA01. Check key-in circuit. NG OK NG OK Remote unit key Pulse input at pin 35 of QA01, When remote unit key is pressed.
33 14-5. No Indication On Screen 14-4. Memory Circuit Check NG NG OK OK OK No indication on screen. Check of RESET at 5V. Check of CLK, CS, BUSY, DATA at pin 22, 23, 24, 25 of QA01. "H" = 5V or puls? Check of character signal at pin 59, 60, 61 of QR60 (5V(p-p)).
34 1. D VD SWITCH BLOCK DIA GRAM 53 52 51 4 5 6 13 15 C Y Y Q I Y Q I DVD SWITCH UNIT QW01 TC4053BP L H L H L H WAC UNIT Y Q (B - Y) I (R - Y) Y Q I Y Q I YC DUAL UNIT Sub V.
35 2. OUTLINE In this model, the D VD input terminals are provided in or- der to receiv e the color difference signals (Y , Cr, Cb) out- put from a D VD player . The luminance (Y) signal input for D VD input uses the VIDEO input terminal in common with the VIDEO 2 input.
36 1. OUTLINE A wide aspect con version (hereafter called W A C) process (3/4 compression process in 4:3 mode and 1/2 compression process on left screen in double window mode) is performed inside the W A C unit (PB6348) in TW40F80.
37 LPF AMP QX28 QX29 LX14 etc QX26 QX27 LX13 etc QX10 QX15 ISI QSI Y WA I WA Q WA I TH Q TH Y TH YSI IBC QSO ISO YSO HRE VMO RCK VDI VBL IBD QX13 QX11 QX06 LX12 etc 1 1 51 17 13 9 VDP 57 NCS 61 12 2 5.
38 • Pin Function Fig. 5-2 Pin function of TC9097F (QFP 80 pin) 25 1I S I VRA2 YSI NC VBC VRD2 VBD4 VDD3(DA2) QSO NC VBD3 VSS3(DA2) ISO VRD1 NC VDD2(DA1) YSO VBD2 VSS2(DA1) VBD1 VSS4(VCO1) VBV NC VF.
39 T able 5-1 Names and functions of TC9097F I/O I – I – – – – – O – – – O – – – O – – – – – I – – – – I – I I – – I I I – Name ISI VRA2 YSI NC VBC VBD2 VBD4 A VDD QSO NC VBD3 A GND ISO VRD1 NC A VDD YSO VBD2 A GND VBD1 A GND NC VFV VFL1 A VDD VLM VDD HDI NC VD1 RESET NC NC TST0 TST1 TST2 NC No.
40 No. 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 I/O I – – I – – – – – O – – – O – – – O – – – .
41 I/O – – I – – No. 76 77 78 79 80 Name NC VBM QSI VB A A GND Function – Bias for MPX, clamp 2 Q color signal input Bias for AD1, AD2 Analog ground 3.
42 4. WIDE ASPECT CONVERSION CIRCUIT F AILURE ANAL YSIS PR OCEDURES 4-1. Left Screen Pictur e F ailur e in Normal Mode/Double Windo w Modes (No Picture, Sync Distrib uted) Picture fallure (Normal/DW m.
43 4-2. Raster Horizontal One 4-2-1. Adjustment Method (1) Disconnect any video inputs (2) Open RX-40. (3) Connect frequency counter to QX19 emitter . (4) Adjust LX18 until frequency reading of “28.7 MHz ± 0.5 MHz” is obtained. Horizontal one Output at pin 8 of PX02 OK? Check V circuit.
44 1. OUTLINE DU AL circuit performs the signal process, etc. on the sub screen and is composed of the followings as sho wn in Fig. 6- 1. • V ideo/color/deflection (V/C/D) process • On-screen disp.
45 3. SYSTEM COMPONENT DIA GRAM OF DU AL UNIT From tuner SY SC Video/color/ deflection process IC µ PC1832GT R- Y B- Y R- Y B- Y Y I Q Control Y I Q OSD ON-screen display super impose TC4W53F MC74HC4.
46 4. CIRCUIT OPERA TION 4-1. V ideo/Color/Deflection Pr ocess Section The video/color/deflection section is sho wn in Fig. 6-2. The luminance signal is supplied from pin Y08 of PY01 and its frequency bandwidth is limited by the low pass f ilter (LPF) and then input to pin 36 of V/C/D IC (VIDEO IN).
47 Y13 Y14 SCL SDA Y08 PIP VIDEO Y15 PIP C L.P.F B.P.F 49 47 SCL2 SDA2 50 SCLP 48 SDAP 46 BLK 43 B 53 COL 54 TIN 51 S.COL 52 CON 62 fsc SEL 61 PAL/NTSC 2 3.
48 4-2. Sub Screen Pr ocess Section The sub screen process section is sho wn in Fig. 6-3. The Y , I and Q signals from the video/color/deflection pro- cess section are limited in their frequency bandwidth by the LPF in the prceeding stage and input to pins 6, 13 and 15 of QY03.
49 4-3. Main/Sub Screen Superimposing Section In normal mode (with only the main screen picture displayed), the YS signal voltage always goes lo w and the Y , I and Q signals from the digital unit are dev eloped at pins 15, 4 and 14 of QY48.
50 5. TERMINAL FUNCTION, DESCRIPTION AND BLOCK DIA GRAM OF MAIN IC 42 Mode SW Separate / Composite SW, ACC amp., Sub color control 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 3.58 / 4.
51 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 PAL/NTSC SW fsc SW H. sync det. filter Sync sepa input Contrast control Sab color control Composite video signal inpu t Power supply (color) Separati color input GND (color) ACC filter I o .
52 Fig. 6-7 QY03 TC9092AF internal block diagram CLAMP MPX AD AD Sub screen video input FILTER FACTOR OPERATION/ GENERATION (KGEN) HORIZONTAL INTERPORATION FILTER (HFB) HORIZONTAL FOLD SIGNAL ELIMINAT.
53 MRD1 MRD2 MRD3 MRD4 MRD5 MRD6 MRD7 MRD8 MRD9 MRD10 RMD11 RMD12 MRD13 MRD14 MRD15 RE RSTR CKR CKRI YSOUT VSS OSCMI OSCMO VDD FHM HFHM FVM VSS SCL SDA SDAINO VSS PROMDI PROMCK PROMRES ME RESET TEST1 .
54 No. Pin name I/O Pin function 1 D A VSS D/A GND 2 D ABIAS3 D/A bias condenser connection terminal 3 D ABIAS2 D/A bias condenser connection terminal 4 AD VDD A/D power supply 5 AD VREFY I A/D Y re f.
55 No. Pin name I/O Pin function 51 MRD1 I Data input terminal 52 MRD2 I Data input terminal 53 MRD3 I Data input terminal 54 MRD4 I Data input terminal 55 MRD5 I Data input terminal 56 MRD6 I Data in.
56 Dout (X8) OE RE RSTR SRCK Data - out buffer (X8) Serial Read Controller 512 Word serial read register (X8) Read line buffer Low-Half (X8) Read line buffer High-Half (X8) 71 Word Sub-register (X8) 7.
57 2-2. Cir cuit Description Fig. 7-1 shows a block diagram of the YCS circuit. (1) A video signal sent through the A V switching circuit passes the input terminal (DG) and enters the YCS unit. (2) The video signal entered is limited in its band width in passing through an aliasing distortion elimination LPF consisting of LZ22, etc.
58 • T erminal description (PZ01) No. DH DC DE DD DB DG DA DF DI DJ Signal name Comb through Y -Comb 9V C-Comb GND V- AV 5V fsc SD A1 SCL1 V oltage Comb through pulse for ED2 ID signal period (V frequenc y), 5V 2V(p-p) +9V ± 0.5V 0.6V(p-p) at burst GND 2V(p-p) +5V ± 0.
59 1. OUTLINE The sync separation circuit, V pulse circuit, and blanking circuit are provided inside Q501 (T A1222AN). The sa w tooth wa ve generation circuit and amplif ier (V dri ver circuit) are provided inside Q302 (T A8859AP). Q301 (LA7833S) contains the pump up circuit and the output circuit.
60 2. V OUTPUT CIRCUIT 2-1. Actual Cir cuit 31 15 14 13 3 6 8 7 6 4 1 5 2 3 C322 R329 Q501 C321 R320 Q302 +9V D309 +35V R301 R330 C319 C314 Q301 C309 C311 R308 C308 D301 C313 R303 L301 R336 R307 L462+L463+L464 R306 R313 C306 R305 C305 R304 C307 D308 Fig.
61 2-3. V Output 2-3-1. Circuit Operation The V output cir cuit consists of a V driver circuit Q302, Pump-up circuit and output circuit Q301, and e xternal circuit components.
62 (4) T o decrease the collector loss of Q3, the pow er supply voltage is decr eased during scanning period as shown in Fig. 8-7, and VCE1 decreases and the collector loss of Q3 also decreases.
63 2-4. V Linearity Characteristic Correction 2-4-1. S-character Correction (Up-and Down-ward Extension Correction) A parabola component dev eloped across C306 is integrated by R306 and C305, and the volta ge is applied to pin 6 of Q302 to perform S-character correction.
64 3-1. +35V Over Curr ent Pr otection Cir cuit The ov er current protection cir cuit cuts of f the power supply relay when it detects abnormal current increased in the +35V po wer line due to failure of the ve rtical deflection circuit. 3-1-1. Theory of Operation Fig.
65 4. RASTER POSITION SWITCHING CIRCUIT 4-1. Outline When the vertical screen position adjustment is carried out on the projection TV , DC current is directly flo wn in the vertical deflection yok e and the raster cannot be mo ved up and do wn. (Because the r aster is mov ed, the color distortion may occur .
66 1. OUTLINE The H deflection circuit works to deflect a beam from left to right by flo wing a sawtooth wa veform of 15.625 kHz/15.735 kHz into the D Y H deflection coil.
67 (4) T o shorten the stora ge time and the falling time, a suf- ficiently high r ev erse bias voltage must be applied to allo w a heavy re v erse current to flow . This operation also stabilizes operation of the horizontal output tran- sistor . Fig.
68 4. HORIZONT AL OUTPUT CIRCUIT The horizontal output circuit applies a 15.625 kHz/15.734 kHz sawtooth wa ve current to the deflection coil with mu- tual action of the horizontal output transistor and the damper diode, and deflects the electron beam from left to right in horizontal direction.
69 Description of the basic circuit 1. t1~t2: A positi ve pulse is applied to base of the output transistor from the driv e circuit, and a forwar d base current is flowing.
70 Amplitude Correction T o vary horizontal amplitude, it is necessary to vary a sawtooth w ave current flo wing into the deflection coil. These are two methods to v ary the current; a method which v .
71 (2) Left-r ight Asymmetrical Cor rection (LIN coil) In the circuit shown in F ig. 9-9 (a), the deflection coil current iH does not flow str aight as sho wn by a dotted line in the Fig.
72 4-2. White P eak Bending Corr ection Circuit 4-2-1. Outline White peak area in screen picture may sometimes cause bend- ing in picture. See f igure below . In TP48E60 series, correction signal which video ripple in video output circuit power supply 200V is input to pin 24 (Bending correction terminal) of Q501.
73 4-3. H Blanking 4-3-1. Outline The H blanking circuit applies a blanking precisely for the horizontal flyback period so that undesirable pictures fold- ing does not appear at screen ends. This unit allows the users to adjust an hor izontal amplitude adjustment, so, picture quality at screen ends will be im- prov ed.
74 4-4. 200V Low V oltage Protection 4-4-1. Outline When the video output power supply 200V is stopped by some abnormality occurence, the current inside CPT in- creases abnormally . So the CPT may be damaged . T o pre- vents this, a 200V lo w voltage protection circuit is provided.
75 5. HIGH V OL T A GE GENERA TION CIRCUIT Fig. 9-15 The high voltage generation circuit de velops an anode v olt- age for the picture tube, focus, screen, CR T heater, video output (210V) and so on b.
76 5-1-1. +210V For the flyback period, pulses are stacked up to DC +125V with FBT , and the volta ge is rectified by D406 and filtered by C446. 5-1-2.
77 6. HIGH VOL T A GE CIRCUIT 6-1. High V oltage Regulator 6-1-1. Outline Generally , four kinds of methods exist to stabilize a high v oltage in high voltage output circuits using the FBT : (1) Stabilization by varying the po wer supply voltage.
78 6-1-3. Actual Fig. 9-22 sho ws the actual circuit used in the unit. A resonant capacitor C0 is also split into two capacitors C443 and C444 in this circuit. The high v oltage regula tor cirucits is structured by splitting the C443 to two capacitors of C443 and C448.
79 Then Q463 turns on. By this T r6 and T r6 turn on to make ON/OFF pulse at pin 7of QA01 in low le vel, Q846 and Q845 turns off, then relay SR81 turns of f. T r6 and T r7 are in thy- ristor-connection, and 5V of po wer holds protection opera- tion until main po wer switch is turned of f.
80 8. O VER CURRENT PR O TECTION CIRCUIT 8-1. Outline If main po wer (125V) current increases abnormally due to components failure, there is possible danger of the second- ary damage like f ailure getting in volv ed in other part fail- ure, and abnormal heating.
81 (4) V picture position (neutral voltage setting) (5) V M-character correction (6) V EHT correction (7) H amplitude (8 ) L and R pin-cushion distortion correction I (entire area) – Not used for this model. (9) L and R pin-cushion distortion correction II (corner portions at top and bottom) – Not used for this model.
82 When the negati ve pulse de v eloped at the point B is inte- grated with Lm and Csm, its average v alue appears at Csm as a negati ve voltage. By modulating this voltage with Q460, a w aveform of Vm is obtained as sho wn in Fig.
83 3. A CTU AL CIRCUIT In the actual circuit, the resonant capacitor is split into two as shown in Fig. 10-7. One, C440, is inserted between the collector of the H. OUT transistor and ground and another C444 inserted between the collector and emitter .
84 3-1. Basic Operation and Current Path 3-1-1. Later Half Scanning Period When the power is turned on, the po wer supply volta ge V B is applied to C S and Csm, and the C S acts as a po w er source for a later half of the scanning period for which the H.
85 3-1-3. Later Half of Flyback Period All ener gy in the coil has been transferred to the resonant capacitors at the center of the flyback period, and the volt- age sho ws the maximum value. Ho we ver , during next half of the flyback period, the ener gy of the resonat capacitor is discharged as a r ev erse current through respecti ve coil.
86 1. OUTLINE The digital con ver gence circuit de velops outputs to correct screen distortion and perform color matching. The digital con ver gence circuit used is of an all digital type and allo ws good adjustments in comprise with a con ventional analog type circuit.
87 Fig. 11-1 Block diagram Filter Filter Filter Filter Filter Filter D/A D/A D/A R G B Ys RAM (8 ∗ 8 ∗ 12bit) ∗ 3 Q715 Q717 Q719 Q705 Q704 Q703 GH GV BH BV RV RH Counter PLL HD VD Q707 Q719 32MH.
88 3. PICTURE ADJUSTMENT Four screens for Normal/Full, Theater wide 1, Theater W ide 2, Theater W ide 3 are provided for the adjustments. When making the adjustments, recei ve the U/VHF or CABLE broad.
89 3-2. Service Mode 3-2-1. Outline The service mode, one of the functions this unit pro vides, is controlled by the microprocessor QA01 and . This mode is set by the special operation to av oid the easy operation by the user . Mov e the cursor to between the adjust- ment points of 8*7/each color and modify the data directly .
90 3-2-3. Initial screen The screen mode is Normal/Full screen mode. Correction point: V ertical 8 * Horiz ontal 7 ( ® and - marks are the adjusting points.) Fig. 11-4 (1) First screen: The initial cross hatch screen appears. The pa ttern col- ors are displayed with 3 colors.
91 3-2-4. Key function of r emote control unit ADV/ POP CH ADV/ PCB CH 2 3 5 6 8 9 4 7 ¥ 0 ENT PIC SIZE TV/VIDEO RECALL POWER CH VOL CH RTN EDS MENU FAV FAV EXIT RESET STOP SCURCE PLAY PCP REC TV/VCR.
92 3-2-5. Operation procedur e (1) Set the screen to Normal or Full mode using the PIC- SIZE key on the r emote controller . (2) Set the unit to the service mode with MUTE + MUTE + MENU keys pressed. (Entering to S mode.) (3 ) Set the unit to the con ver gence adjusting mode by press- ing the “7” ke y on the remote controller .
93 3-3-2. Theater Wide1 Fig. 11-7 0 428.5 351 205 66.5 428.5 351 205 66.5 249 213 103.5 0 115 217.5 249 7.5 Screen center 40 inches 16:9 Screen size: Horizontal 885mm x Vertical 498mm 0 605 495.5 289.5 93.5 348.5 298 144 0 159 303 348.5 10 Screen center 93.
94 3-3-3. Theater Wide 2 Fig. 11-9 Fig. 11-10 0 0 298.9 256.2 128.1 435 217.5 362.5 72.5 72.5 217.5 362.5 435 Screen center 40 inches 16:9 Screen size: Horizontal 885mm x Vertical 498mm 128.1 256.2 298.9 0 0 618 309 515 103 Screen center 56 inches 16:9 Screen size: Horizontal 1239mm x Vertical 697mm 180.
95 3-3-4. Theater Wide 3 Fig. 11-11 0 0 269.5 231 115.5 115.5 231 269.5 435 217.5 362.5 72.5 72.5 217.5 362.5 435 Screen center 40 inches 16:9 Screen size: Horizontal 885mm x Vertical 498mm 0 0 618 309 515 103 Screen center 56 inches 16:9 Screen size: Horizontal 1239mm x Vertical 697mm 379.
96 4. CASE STUD Y In many cases, a color de viation will be corrected by return- ing the HIT and WID data for the main deflection side to the initial values. Follo wings are cases which need readjustment of the con ver- gence by all means. 4-1. When CR T is Replaced.
97 5. TR OUBLESHOO TING 5-1. Adjusting Procedur e in Replacing CR T Cut off Lens focus Electrical focus Yoke horizontal User convergence enter check Centering Convergence adjustment White balance End User convergence enter check Centering Convergence adjustment End 5-2.
98 6. CONVERGENCE OUTPUT CIRCUIT 6-1. Outline This circuit current-amplif ies digital conv ergence correction signal at output circuit, and drives by con ver gence yoke to perform picture adjustment. Digital con ver gence output signal 6ch adjustment is done.
99 6-3. Con vergence Block Diagram Fig. 11-14 DIGITAL CONVER P708 RV GV BV RH GH BH +9V -9V +5V HD VD R G B I2CS SCLV SDAU SCLM SDAM (REGULATER) Q754 +5V Q755 +9V Q756 -9V Q764 TC74HC4050 (HD) Q767 TC.
100 7. CONVERGENCE TR OUBLESHOO TING CHAR T Fig. 11-6 Pump-up Convergence output signals correction wave +30V -15V 0V Vertical Q751 (R/G/B) Horizontal Q752 (R/G/B) Reray OFF Reray ON Reray ON Reray ON Reray OFF Reray OFF NG NG NG OK OK OK OK OK Protect 1 Relay turns on once but immediately turns off.
RF SW H003 ANT1 ANT2 HY01 TUNER/IF SCL SDA ATF2 TV2-V TUNER SCL SDA H001 H002 TUNER SDA SCL ATF1 RWL L R TV1-V, L, R FRONT SURROUND UNIT L R L R SURROUND SW AFT2 AFT1 I C STOP SCL SDA 2 MUTE INT/EXT S.
Een belangrijk punt na aankoop van elk apparaat Toshiba TW40F80 (of zelfs voordat je het koopt) is om de handleiding te lezen. Dit moeten wij doen vanwege een paar simpele redenen:
Als u nog geen Toshiba TW40F80 heb gekocht dan nu is een goed moment om kennis te maken met de basisgegevens van het product. Eerst kijk dan naar de eerste pagina\'s van de handleiding, die je hierboven vindt. Je moet daar de belangrijkste technische gegevens Toshiba TW40F80 vinden. Op dit manier kan je controleren of het apparaat aan jouw behoeften voldoet. Op de volgende pagina's van de handleiding Toshiba TW40F80 leer je over alle kenmerken van het product en krijg je informatie over de werking. De informatie die je over Toshiba TW40F80 krijgt, zal je zeker helpen om een besluit over de aankoop te nemen.
In een situatie waarin je al een beziter van Toshiba TW40F80 bent, maar toch heb je de instructies niet gelezen, moet je het doen voor de hierboven beschreven redenen. Je zult dan weten of je goed de alle beschikbare functies heb gebruikt, en of je fouten heb gemaakt die het leven van de Toshiba TW40F80 kunnen verkorten.
Maar de belangrijkste taak van de handleiding is om de gebruiker bij het oplossen van problemen te helpen met Toshiba TW40F80 . Bijna altijd, zal je daar het vinden Troubleshooting met de meest voorkomende storingen en defecten #MANUAl# samen met de instructies over hun opplosinge. Zelfs als je zelf niet kan om het probleem op te lossen, zal de instructie je de weg wijzen naar verdere andere procedure, bijv. door contact met de klantenservice of het dichtstbijzijnde servicecentrum.
