Gebruiksaanwijzing /service van het product CY8C23533 van de fabrikant Cypress Semiconductor
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CY8C23433, CY8C23533 PSoC ® Programmable System-on-Chip™ Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-44369 Rev .
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 2 of 37 PSoC Functional Overview The PSoC family consists of many mixed-signal array wi th On-Chip Controller devices. T hese devices are designe d to replace multiple traditional M CU-base d system components with a low cost single-chip p rogrammable device.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 3 of 37 Analog System The Analog system consists of an 8-bit SAR ADC and four configurable blocks. The progr ammable 8-bit SAR ADC is an optimized ADC that run s up to 300 Ksps, with monotonic guarantee.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 4 of 37 Additional System Resources System Resources, some of which a re listed in the previous sections, provide additio nal capability useful to complete systems. Additional resources include a multip lier , decimator , low voltage detection, and power on reset.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 5 of 37 Development T ools PSoC Designer is a Microsoft ® Windows-ba sed, integrated development environment for th e Programmable System-on-Chip (PSoC) devic es. The PSoC Designe r IDE and application runs on Windows NT 4.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 6 of 37 Debugger The PSoC Designer Debugger s ubsystem provides hardware in-circuit emulation, allowi ng t he designer to test the program in a physical system while providi ng an internal view of the PSoC device.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 7 of 37 The next step is to write your mai n program, and an y sub-routines using PSoC De signer ’s Application Editor subsystem.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 8 of 37 Pinout s The PSoC CY8C23X33 is avail able in 32-pin QFN an d 28-pin SSOP pa ckages. Every port pi n (labeled with a “P”), excep t for Vss and Vdd in the following table and figure, is capable of Digital IO.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 9 of 37 28-Pin Part Pinout T able 4. Pin Defini tions - 28-Pin (SSOP) Pin Number CY8C23433 Digit al Analog Pin Name Description Figure 6.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 10 of 37 Register Reference This section lists the registers of the CY8C23433 PSoC device by using mapping tables, in offset order . Register Conventions Abbreviation s Us ed The register conventions specific to th is section are listed in the following table.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 1 1 of 37 T able 6. Register Map Bank 0 T able: User Space Name Addr (0,Hex) Access Name Addr (0,Hex) Access Name Addr (0,Hex) Access Name.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 12 of 37 3E 7E BE CPU_SCR1 FE # 3F 7F BF CPU_SCR0 FF # T able 6. Register Map Bank 0 T able: User Space (continued) Name Addr (0,Hex ) Access Name Addr (0,Hex ) Access Name Addr (0,Hex ) Access Name Addr (0,Hex ) Access Gray fields are reserve d.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 13 of 37 35 ACB01CR0 75 RW RDI0RO0 B5 R W F5 36 ACB01CR1 76 RW RDI0RO1 B6 R W F6 37 ACB01CR2 * 77 RW B7 CPU_F F7 RL 38 78 B8 F8 39 79 B9 F9 3A 7A BA FLS_PR1 FA RW 3B 7B BB FB 3C 7C BC FC 3D 7D BD FD 3E 7E BE CPU_SCR1 FE # 3F 7F BF CPU_SCR0 FF # T able 7.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 14 of 37 Electrical Specifications This section presents the DC and AC electrical specifications of the CY8C23433 PSoC device. For the latest electrical speci fica tions, visit http://www .
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 15 of 37 Absolute Maximum Ratings Exceeding maximum ratings may shorten the useful li fe of the device.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 16 of 37 DC Electrical Characterist ics DC Chip-Level Specificatio ns The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 17 of 37 DC General Purpose IO Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 18 of 37 DC Operational Amplifi er Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 19 of 37 DC Low Power Comparator Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 20 of 37 DC Analog Output Bu ffer Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 21 of 37 DC Analog Refe rence Specificatio ns The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 22 of 37 DC Analog PSoC Block Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 23 of 37 DC Programming Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 24 of 37 SAR8 ADC DC Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 25 of 37 AC Electrical Characterist ics AC Chip-Level Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 26 of 37 Figure 9. PLL Lock T iming Diagram Figure 10. PLL Lock for Low Gain Setting Timing Diagram Figure 1 1. External Cryst al O scillator S t artup Timing Diagram Figure 12. 24 MHz Period Jitter (IMO) Timing Diagram Figure 13.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 27 of 37 AC General Purpose IO Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 28 of 37 T able 27. 3.3V AC Operational Amp l ifier Specifications Symbol Description Min Ty p Max Units T ROA Rising Settling Time from 80% of Δ V to 0.1% of Δ V (10 pF load, Unity Ga in) Power = Low , Opamp Bias = Low Power = Medium, Op amp Bias = H ig h – – – – 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 29 of 37 When bypassed by a capacitor on P2[4], the noise of the anal og g r ound signal distributed to e ach bl ock is reduced by a factor o f up to 5 (14 dB). This is at frequencies above the corner frequency defined by the on-chip 8.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 30 of 37 AC Low Power Comparator Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 31 of 37 AC Analog Output Buffer Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 32 of 37 AC External Clock Specifications The following table lists the guaranteed maximum and minimum spec ifications for the voltage and temperature ranges: 4.75V to 5. 25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 33 of 37 AC I 2 C Specif icatio ns The following table lists the guaranteed maximum an d minimum s pecificatio ns for the voltage and temperature ranges: 4.75V to 5.25V and -40 ° C ≤ T A ≤ 85 ° C, or 3.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 34 of 37 Packaging Information This section illustrates th e packaging specifications for the CY8C23x3 3 PSoC device, along with the thermal impedan ces for each package, solder reflow peak temperature, and t he typical package capacit ance on crystal pins.
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 35 of 37 Figure 20. 28-Pin (210-Mil) SSOP Thermal Impedances Cap acit ance on Cryst al Pins Solder Reflow Peak T emperature Following is the minimum solder reflow peak temperature to achieve go od solde rability .
CY8C23433, CY8C23533 Document Number: 001-44369 Rev . *B Page 36 of 37 Ordering Information The following table lists the CY8C 23X33 PSoC device family ke y package features and orderin g codes.
Document Number: 001-44369 Rev . *B Revised December 05, 2008 Page 37 of 37 PSoC Designer™, Programmable System-on-Chip ™, an d PS oC Exp re ss™ are tra demarks a nd PSo C® is a registe red t rade mark of Cypress S emi con ductor Corp.
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