Gebruiksaanwijzing /service van het product SED 1520 Series van de fabrikant Epson
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SED1520 Series LCD driver with RAM Technical Manual.
NOTICE No parts of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
CONTENTS Selection Guide 1. SED1510 Series 2. SED1520 Series 3. SED152A Series 4. SED1526 Series 5. SED1530 Series 6. SED1540 Series 7. SED1560 Series 8.
SED1500 Series Selection Guide.
Ultra-low power consumption and on-chip RAM make this series ideal for compact LCD-based equipment. ■ LCD drivers with RAM for small- and medium-sized displays SED1500 series Part number Duty Segmen.
Al pad chip Al pad chip Au bump chip Au bump chip TCP QTCP Al pad chip Al pad chip Au bump chip Au bump chip TCP TCP QTCP Al pad chip Au bump chip TCP QTCP Au bump chip Au bump chip Au bump chip TCP T.
Al pad chip Al pad chip Au bump chip Au bump chip TCP Al pad chip Au bump chip TCP Al pad chip Al pad chip Au bump chip Au bump chip TCP TCP Au bump chip – SED1530D 0A SED1530D AA SED1530D 0B 1/32, 1/33 100 33 SED1530D AB SED1530T AA SED1531D 0A SED1531D 0B 132 – 132 × 65 8-bit parallel SED1531T 0A 2.
2. SED1520 Series.
– i – SED1520 Series SED1520 Series Contents OVERVIEW .......................................................................................................................................................... 2-1 FEATURES .........................
SED1520 Series EPSON 2–1 SED1520 Series OVERVIEW The SED1520 family of dot matrix LCD drivers are designed for the display of characters and graphics.
SED1520 Series 2–2 EPSON A 0 ,CS Display data latch circuit LCD drive circuit Common counter Display start line register Line counter Line address decoder Column address decoder Column address count.
SED1520 Series EPSON 2–3 SED1520 Series PACKAGE OUTLINE QFP5 QFP15 Note: This is an example of SED1520F pin assignment. The modified pin names are given below. SED1520: Common outputs COM0 to COM15 of the master LSI correspond to COM31 to COM16 of the slave LSI.
SED1520 Series 2–4 EPSON PAD Pad Arrangement Chip specifications of AL pad package Chip size: 4.80 × 7.04 × 0.400 mm Pad pitch: 100 × 100 µ m Chip specifications of gold bump package Chip size: 4.80 × 7.04 × 0.525 mm Bump pitch: 199 µ m (Min.
SED1520 Series EPSON 2–5 SED1520 Series 1 COM5 159 6507 2 COM6 159 6308 3 COM7 159 6108 4 COM8 159 5909 5 COM9 159 5709 6 COM10 159 5510 7 COM11 159 5310 8 COM12 159 5111 9 COM13 159 4911 10 COM14 1.
SED1520 Series 2–6 EPSON PIN DESCRIPTION (1) Power Pins Name Description V DD Connected to the +5Vdc power. Common to the V CC MPU power pin. V SS 0 Vdc pin connected to the system ground. V 1 , V 2 , V 3 , V 4 , V 5 Multi-level power supplies for LCD driving.
SED1520 Series EPSON 2–7 SED1520 Series (3) LCD Drive Circuit Signals Name Description CL Input. Effective for an external clock operation model only. This is a display data latch signal to count up the line counter and common counter at each signal falling and rising edges.
SED1520 Series 2–8 EPSON level after reset (see Table 1). When the CS signal is high, the SED1520 series is disconnected from the MPU bus and set to stand by. However, the reset signal is entered regardless of the internal setup status. BLOCK DESCRIPTION System Bus MPU interface 1.
SED1520 Series EPSON 2–9 SED1520 Series Figure 1 Bus Buffer Delay Busy flag When the Busy flag is logical 1, the SED1520 series is executing its internal operations. Any command other than Status Read is rejected during this time. The Busy flag is output at pin D7 by the Status Read command.
SED1520 Series 2–10 EPSON Common Timing Generator Circuit Generates common timing signals and FR frame signals from the CL basic clock. The 1/16 or 1/32 duty (for SED1520) or 1/8 or 1/16 duty (for SED1522) can be selected by the Duty Select command.
SED1520 Series EPSON 2–11 SED1520 Series *1 If the parasitic capacitance of this section increases, the oscillation frequency may shift to the lower frequency. Therefore, the Rf oscillation frequency must be reduced below the specified level. *2 A CMOS buffer is required if the oscillation circuit is connected to two or more slave MPU chips.
SED1520 Series 2–12 EPSON COM 0 COM 1 COM 2 COM 3 COM 4 COM 5 COM 6 COM 7 COM 8 COM 9 COM 10 COM 11 COM 12 COM 13 COM 14 COM 15 COM 16 COM 17 COM 18 COM 19 COM 20 COM 21 COM 22 COM 23 COM 24 COM 25 .
SED1520 Series EPSON 2–13 SED1520 Series COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 SEG0 SEG1 SEG2 SEG3 SEG4 0123 1 5 0 0 01 2 3 1 1 2 2 3 3 31 15 31 FR CO.
SED1520 Series 2–14 EPSON Code Command A0 RD WR D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 Display On/OFF 0 1 0 1 0 1 0 1 1 1 0/1 Display start line 0 1 0 1 1 0 Display start address (0 to 31) Set page address.
SED1520 Series EPSON 2–15 SED1520 Series Command Description Table 3 is the command table. The SED1520 series identifies a data bus using a combination of A0 and R/W (RD or WR) signals. As the MPU translates a command in the internal timing only (independent from the external clock), its speed is very high.
SED1520 Series 2–16 EPSON Set Column Address This command specifies a column address of the display data RAM. When the display data RAM is accessed by the MPU continuously, the column address is incremented by 1 each time it is accessed from the set address.
SED1520 Series EPSON 2–17 SED1520 Series Read Display Data Reads 8-bits of data from the data I/O latch, updates the contents of the I/O latch with display data from the display data RAM location specified by the contents of the column address and page address registers and then increments the column address register.
SED1520 Series 2–18 EPSON Read-Modify-Write This command defeats column address register auto-increment after data reads. The current conetents of the column address register are saved.
SED1520 Series EPSON 2–19 SED1520 Series Reset This command clears • the display start line register. • and set page address register to 3 page. It does not affect the contents of the display data RAM. When the power supply is turned on, a Reset signal is entered in the RES pin.
SED1520 Series 2–20 EPSON SPECIFICATIONS Absolute Maximum Ratings Parameter Symbol Rating Unit Supply voltage (1) V SS –8.0 to +0.3 V Supply voltage (2) V 5 –16.5 to +0.3 V Supply voltage (3) V 1 , V 4 , V 2 , V 3 V5 to +0.3 V Input voltage V IN V SS –0.
SED1520 Series EPSON 2–21 SED1520 Series DC Characteristics (Cont’d) Ta = –20 to 75 deg. C, V DD = 0 V unless stated otherwise Rating Parameter Symbol Condition Unit Applicable Pin Min. Typ. Max. V OLT I OL = 3.0 mA — — V SS +0.4 OSC2 V OLC1 I OL = 2.
SED1520 Series 2–22 EPSON Relationship between f OSC , f FR and R f , and operating bounds on V SS and V5 *9 • Relationship between oscillation frequency, frames and Rf (SED1520F 0A ), (SED1522F 0A ) 40 30 20 10 0 0.5 1.0 1.5 2.0 2.5 Ta=25°C V =-5V SS Ta=25°C V =-5V SS [kHz] fosc V =-3V SS V =-5V SS 200 100 0 0.
SED1520 Series EPSON 2–23 SED1520 Series AC Characteristics • MPU Bus Read/Write I (80-family MPU) Ta = –20 to 75 deg. C, V SS = –5.0 V ± 10% unless stated otherwise Rating Parameter Symbol Condition Unit Signal Min.
SED1520 Series 2–24 EPSON • MPU Bus Read/Write II (68-family MPU) Ta = –20 to 75 deg. C, V SS = –5 V ± 10 unless stated otherwise Rating Parameter Symbol Condition Unit Signal Min.
SED1520 Series EPSON 2–25 SED1520 Series • Display Control Signal Timing Input Ta = –20 to 75 deg. C, V SS = –5.0 V ± 10% unless stated otherwise Rating Parameter Symbol Condition Unit Signal Min.
SED1520 Series 2–26 EPSON APPLICATION NOTES MPU Interface Configuration 80 Family MPU RESET V DD V CC V 5 V SS SED1520F AA GND MPU Decoder RES WR RD D0 to D7 CS A0 RES WR RD D0 to D7 A1 to A7 IOQR A.
SED1520 Series EPSON 2–27 SED1520 Series LCD Drive Interface Configuration SED1520F 0A –SED1520F 0A SED1522F 0A –SED1522F 0A SED1520F AA –SED1520F AA SED1522F AA –SED1522F AA SED1520F 0A ) .
SED1520 Series 2–28 EPSON SED1520F AA –SED1521F AA Notes: 1. The duty cycle of the slave must be the same as that for the master. 2. If a system has two or more slave drivers a CMOS buffer will be required.
SED1520 Series EPSON 2–29 SED1520 Series LCD Panel Wiring Example (The full-dot LCD panel displays a character in 6 × × × × × 8 dots.) 1/16 duty: • 10 characters × 2 lines 1 16 16 1 LCD 16 .
SED1520 Series 2–30 EPSON Package Dimensions • Plastic QFP5–100 pin Dimensions: inches (mm) • Plastic QFP15–100 pin 80 51 0.110 (2.8) 0~12 ° 1 81 50 100 31 30 0.026 ± 0.004 (0.65 ± 0.1 ) 0.012 ± 0.004 (0.30 ± 0.1 ) 0.551 ± 0.004 (14 ± 0.
SED1520 Series EPSON 2–31 SED1520 Series Specifications • Base: U-rexS, 75 µ m • Copper foil: Electrolytic copper foil, 35 µ m • Sn plating • Product pitch: 81P (28.
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