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Dual, Ultralow Noise Variable Gain Amplifier AD604 Rev. E Informa tion furn ished by A nalog Dev ices is be lieved to be ac curate and reliab le. How ever , no responsib ility is assumed by Analog Device s for its use, nor for an y infringemen ts of patents or othe r rights o f third parties that m ay resu lt from i ts use.
AD604 Rev. E | Page 2 of 32 T ABLE OF CONTENTS Fea tures .............................................................................................. 1 A pplica tions ..............................................................................
AD604 Rev. E | Page 3 of 32 SPECIFICA TIONS Each amplifier channel at T A = 25°C, V S = ±5 V , R S = 50 Ω, R L = 500 Ω, C L = 5 pF , V REF = 2.50 V (scaling = 20 dB/V), 0 dB to 48 dB gain rang e (pream plifier gain = 14 dB), V O CM = 2.5 V , C1 and C2 = 0.
AD604 Rev. E | Page 4 of 32 Par ameter Conditions Min T yp Max Unit AC CURACY Absolute Gain Error 0 dB to 3 dB 0.25 V < VGN < 0.400 V −1.2 +0.75 +3 dB 3 dB to 43 dB 0.400 V < VGN < 2.400 V −1.0 ±0.3 +1.0 dB 43 dB to 48 dB 2.400 V < VGN < 2.
AD604 Rev. E | Page 5 of 32 ABSOLUTE MAXIMUM RA TINGS Table 2. Par ameter 1 , 2 Rating Supply V oltage ±V S Pin 17 to Pin 20 (with Pin 16, Pin 22 = 0 V ) ±6.
AD604 Rev. E | Page 6 of 32 PIN CONFIGURA TION AND FU NCTION DESCRIPTIONS – DSX1 1 + DSX1 2 PAO1 3 FBK 1 4 VGN1 24 VREF 23 OUT1 22 GND1 21 PAI1 5 COM 1 6 COM 2 7 VPOS 20 VNEG 19 VNEG 18 PAI2 8 VPOS 17 FBK 2 9 G ND2 16 PAO2 10 OUT2 15 + DSX2 11 VOCM 14 – DSX2 12 VGN2 13 AD604 TOP VIEW (Not to Scal e) 00540-0 02 Figure 2.
AD604 Rev. E | Page 7 of 32 VGN (V) –10 TYPICAL PERFORMANCE CHARACTE RISTICS U nless other wis e noted , G (pream plifier) = 14 dB, VREF = 2.5 V (20 dB/V scaling), f = 1 MHz, R L = 500 Ω, C L = 5 pF , T A = 25°C, and V SS = ±5 V . GAIN SCA LING (dB /V) 40.
AD604 Rev. E | Page 8 of 32 VGN (V) GAI N ERROR (d B) 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 FRE QUENCY (Hz ) GAIN (dB) 50 40 –50 30 20 10 0 –10 –20 –30 –40 100k 1M 10M 100M 0.2 0. 7 1.2 1. 7 2. 2 2.7 20dB/ V VREF = 2.5V 30dB/V VREF = 1.
AD604 Rev. E | Page 9 of 32 1000 1 0.1 10 1 0.1 VG N = 2. 9V VGN (V) 100 10 NOISE (nV/ Hz) 0.1 0. 5 0.9 1. 3 1. 7 2.1 2. 5 2.9 00540-015 Figure 15. Input Referred N oise vs. VGN 900 850 800 750 700 650 600 TEM PERAT URE (°C) NOI SE (p V/ Hz) VGN = 2.
AD604 Rev. E | Page 10 of 3 – 20 2 FREQ UENCY (Hz) HARMONI C DIS TO RTI ON ( dBc) – 40 –50 –70 –60 –45 –55 –65 100k 1M 10M 100M V O =1 Vp - p VGN = 1V HD3 HD2 00540-0 21 Figure 21.
AD604 Rev. E | Page 11 of 32 100ns/ DIV 400mV/ DI V 2 V –2V 253ns 1 .253µ s V O =2 Vp - p VGN = 1.5V 00540-027 Figure 27. Larg e Signal Pu lse Response 100ns/ DIV 40mV/ DI V 200 –200 253ns 1 .253µ s V O =2 0 0 m Vp - p VGN = 1.5V TRIG'D 00540-028 Figure 28.
AD604 Rev. E | Page 12 of 32 FRE QUENCY (Hz ) 1M 1k 1 100k 10k 100 10 1k 10k 100k 1M 10M 100M INPUT IM PEDANCE ( Ω ) 00540-033 25.8 Figure 33. Input Impedance vs .
AD604 Rev. E | Page 13 of 32 THEOR Y OF OPERA TION The AD604 is a dual-channel V GA with an ultralow no ise preampli f ier . Fi g ure 3 7 shows the sim plified blo ck diagram o f one channel.
AD604 Rev. E | Page 14 of 32 PREAMPLIFIER Th e i nput c apab ility of the followin g single-sup ply DSX (2.5 ± 2 V for a +5 V sup ply) limits the maximum input vol tage of the prea mplifier to ±400 mV for the 14 dB ga in configuration or ±200 mV for the 20 dB gain configura tion.
AD604 Rev. E | Page 15 of 32 12 11 10 A unique circuit techniq ue is used to interpolate con tinuously amo ng t he tap p oi nt s, thereby providin g co ntinuo us a tten u ation from 0 dB to −48.36 dB . The ladder network, together wi th t he interpolation mechanism, can be considered a v ol ta ge -c on tr o lle d potenti ometer .
AD604 Rev. E | Page 16 of 32 GAIN C ONTROL VOLTA GE (VGN) 5 0 –5 AC COUPLING The DSX port ion of the AD604 is a single-su pply circuit an d, therefore, its inputs need to be ac- coupled to accommo date groun d-based signals.
AD604 Rev. E | Page 17 of 32 The AF A of fers the following additional features: • The ability t o invert the signal by switchin g t he positive an d n ega tive in pu ts to th e la dder net wo rk .
AD604 Rev. E | Page 18 of 32 12 APPLICA TIONS INFORMA TION The basic circuit in Figur e 43 shows the conn ect ions fo r one channel o f the AD604. The sig nal is ap plied at Pin 5. RGN is normally 0, in which case the pream plif ier is set to a gain of 5 (14 dB).
AD604 Rev. E | Page 19 of 32 VG 13 16 15 14 19 18 17 24 23 22 21 20 12 11 10 9 8 1 2 3 4 7 6 5 AD604 –5V +5V VREF RF O UT –5V +5V 8 7 6 5 1 2 3 4 AD71 1 NC OUT AD83 5 +5V –5V –5V +5V 2 VSET (&.
AD604 Rev. E | Page 20 of 32 The 50 Ω terminatio n resistor , in parallel with the 50 Ω source resistan ce of the signal genera tor , forms an effective resis tance o f 25 a s s ee n by th e inp ut of the pream plifier , crea ting 4.07 V of rms noise a t a b andwidth o f 40 MHz.
AD604 Rev. E | Page 21 of 3 A t 1 MH z, th e a tt en ua ti on is about −0.2 dB , increasing t o −6 dB at 10 MHz and − 28 dB at 100 M Hz. Signals less than ap pro x ima tely 1 MHz ar e not significantly affected. 2 Figur e 49 sho ws the con trol vol tage vs.
AD604 Rev. E | Page 22 of 32 MEDICAL ULTRASOUND TGC DRIVING THE AD9050, A 10-BIT, 40 MSPS ADC The AD604 is a n ideal candida te for the tim e gain con t rol (TGC) am plifier t hat is requir ed in medic al ultrasound systems to limit the dynamic range o f the signa l that is p resented to the ADC.
AD604 Rev. E | Page 23 of 32 13 16 15 14 19 18 17 24 23 22 21 20 12 11 10 9 8 1 2 3 4 7 6 5 AD604 +5V –5V IN 1 VREF OUT1 VOCM VG1 VG2 OUT2 NOT E 2 NOT E 3 NOT E 3 IN 2 PAO2 PAO1 –DSX1 +DSX1 PAI1 FBK 1 PAO1 COM1 COM2 PAI2 FBK 2 PAO2 +DSX2 –DSX2 VGN1 VREF VPOS GND1 OUT1 VNEG VNEG VPOS GND2 OUT2 VOCM VGN2 OPTIONA L R3 RGN C6 0.
AD604 Rev. E | Page 24 of 3 EV ALUA TION BOARD 2 Figur e 55 is a ph otogra ph of th e AD604 evalua tion board assem bly . M ultiple inp ut conn ections, tes t poin ts, jum per selectable op ti ons , and on-board trims offer con venience w hen configuring the AD604 in various operatin g modes.
AD604 Rev. E | Page 25 of 32 Connecting the DSX In puts to the Preamplifiers T o conn ec t the DSX inputs t o the pream plifiers, install jum pers in the JP6 lower position and in JP15. V erif y that the jum pers in JP13 and JP14 are r emoved. Cascaded DSX T o channel-cascade the two channels, insert a jumper in JP13.
AD604 Rev. E | Page 26 of 3 0-057 2 EVALUATION BOARD ARTWORK AND SCHEMATIC 00540-0 59 Figure 59. Internal Ground Plane 0054 0054 Figure 57. Compon ent Side Copper 00540- 058 Figure 58. Second ary Side Copper 0-060 Figure 60. Intern al Power Plane www.
AD604 Rev. E | Page 27 of 32 R12 –DSX1 P AO1 OUT1 VREF VGN1 +DSX1 15 4 3 2 1 13 14 16 17 18 19 20 10 7 9 8 6 5 C8 0.1µ F C9 0.1µF C7 0.1µ F C14 0.
AD604 Rev. E | Page 28 of 32 CONT ROL LI NG DI MENS IO NS ARE I N INCHES ; MI LL IM ETE R DIME NSI ONS (IN P ARENT HESE S) ARE ROUNDE D-OF F INCH EQ UI V AL ENT S F OR REFE RENCE O NL Y AND ARE NOT APPRO PRI A TE FO R USE I N DESI GN. CORNER L EADS M A Y BE CO NFI GURE D AS W HOL E OR HAL F LEADS .
AD604 Rev. E | Page 29 of 32 COMP LI ANT TO JEDE C ST ANDARDS MO -150-AG 060106-A 24 13 12 1 8.50 8.20 7.90 8.20 7.80 7.40 5.60 5.30 5.00 SEA TI NG PLANE 0.05 MI N 0.65 BSC 2.00 M AX 0.38 0.22 COPLANARI TY 0.10 1.85 1.75 1.65 0.25 0.09 0.95 0.75 0.55 8° 4° 0° Figure 64.
AD604 Rev. E | Page 30 of 32 NOTES www.BDTIC.com/ADI.
AD604 Rev. E | Page 31 of 32 NOTES www.BDTIC.com/ADI.
AD604 Rev. E | Page 32 of 32 NOTES ©1996–2008 Analog Devices, Inc. All rights reserved. Tradem arks and registered trademarks are the prop erty of their respective owners.
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