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EM78P259N/260N 8-Bit Microprocessor with OTP ROM Product Specification D OC . V ERSION 1.2 ELAN MICROELECTRONICS CORP. May 2007.
T rademark Acknowledgments: IBM is a registered trad emark and PS/2 is a trademark of IBM. W indows is a trademark of Microsoft Corporation. ELAN and ELAN logo are trademarks of ELAN Microelectronics Corporation.
Contents Product Specificat ion (V1.2) 0 5.18.2007 • iii Contents 1 General Description .................................................................................................. 1 2 Features .................................................
Contents iv • Product Specifica tio n (V1.2) 05.18.2007 6.2.13 IOC61 (TCCB Counter) ....................... .................. ....................... ................... 23 6.2.14 IOC71 (TCCBH/M SB Counter) ................. .......................
Contents Product Specificat ion (V1.2) 0 5.18.2007 • v 6.1 1 Oscill ator ......................................................................................................... 60 6.1 1.1 Oscillator Mode s ...... ....................... ..........
Contents vi • Product Specification (V1.2) 05.18.2007 Specificati on Revision History Doc. Version Revision Descr iption Date 1.0 Init ial official version 2005/06/ 16 1.1 Added the IRC d rift rate in the fe ature 2006/05/29 1.2 1. Improve d the contents and f ormat of the Featu res section, Fig.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 1 (This specificatio n is subject to change without f urther notice) 1 General Description The EM78P259N an d EM78P260N are 8-bit microproc essors designed and devel oped with lo w-power and high-spee d CMOS technology .
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 2 • Product Specificatio n (V1.2) 05.18.2007 (This specification is sub ject to change without further notice) 3 Pin Assignment (1) 18-Pin DIP/SOP P5.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 3 (This specificatio n is subject to change without f urther notice) 5 Pin Description 5.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 4 • Product Specificatio n (V1.2) 05.18.2007 (This specification is sub ject to change without further notice) 5.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 5 (This specificatio n is subject to change without f urther notice) 6 Function Description 6.1 Operational Registers 6.1.1 R0 (Indirect Address Register) R0 is not a physically implemented register .
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 6 • Product Specificatio n (V1.2) 05.18.2007 (This specification is sub ject to change without further notice) "JMP" instruction allows direct load ing of the lower 10 program counter bits.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 7 (This specificatio n is subject to change without f urther notice) 6.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 8 • Product Specificatio n (V1.2) 05.18.2007 (This specification is sub ject to change without further notice) 6.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 9 (This specificatio n is subject to change without f urther notice) 6.1.6 R5 ~ R6 (Port 5 ~ Port 6) R5 & R6 ar e I/O regist ers The upper 2 bits of R5 are fixed to “0” (if EM78 P 259N is selected).
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 10 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Bit 3 & Bit 2 (RCM1, RCM0): IRC mod e selection bit s RCM 1 RCM 0 Frequenc y (MHz ) 1 1 4 (default) 1 0 8 0 1 1 0 0 455kHz 6.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 11 (This specificatio n is subject to change without f urther notice) 6.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 12 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Bit 1 ~ Bit 0 (ADIS1 ~ADIS0): Analog Input Select 00 = ADIN0/P50 01 = ADIN1/P51 10 = ADIN2/P52 1 1 = ADIN3/ P53 These bits can only be changed when the A DIF bit (see Section 6.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 13 (This specificatio n is subject to change without f urther notice) 6.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 14 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Bit 2 (CMPWE): Comparator wake-up enable bit 0 = Disable Comparator wake-up 1 = Enable Comp arator wake-up When C omparator enters sleep mode, this bit must b e set to “Enable.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 15 (This specificatio n is subject to change without f urther notice) 6.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 16 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Bit 2 ~ Bit 0 (PST2 ~ PST0): TCC pres.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 17 (This specificatio n is subject to change without f urther notice) Bit 1 (TCCA TS): TCCA signal source 0 =: internal instruction cycle clock. P61 is a bi-directional I/O pin.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 18 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 0 = increment if the tran sition from low to high takes place on the TCCC pin 1 = increment if the transition from high to low ta kes place on the TCCC pin 6.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 19 (This specificatio n is subject to change without f urther notice) Bit 6 ~ Bit 4 (TCCCS2 ~ TCCCS0.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 20 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 6.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 21 (This specificatio n is subject to change without f urther notice) 6.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 22 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Bit 5 (ADIE): ADIF inte rrupt enable bit 0 = disable ADIF interrupt 1 = ena ble ADIF interrupt Bit 4 (CMPIE ) : CMPIF interrupt enable bit.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 23 (This specificatio n is subject to change without f urther notice) Bit 5 (TCCCIE): TCCCIF interru.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 24 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 6.2.14 IOC71 (TCC BH/MSB Counter) The IOC71 (TCCBH) is an 8-bit clock coun ter for the most significan t byte of TCCBX (TCCBH) .
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 25 (This specificatio n is subject to change without f urther notice) 6.2.16 IOC91 (Low Time Register) The 8-bit Low time register controls the active or Low segment of the pulse.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 26 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Bit 6 ~ Bit 4 (HTS2 ~ HTS0): High tim.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 27 (This specificatio n is subject to change without f urther notice) 6.3 TCC/ WDT an d Prescaler There are two 8-bit counters available as prescalers that can be extended to 16-bit counter for the TCC and WDT re spectively .
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 28 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 8- Bi t c ount er WDT P r escaler 8 t.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 29 (This specificatio n is subject to change without f urther notice) PCWR PCRD PDWR PDRD IOD 0 1 M U X PORT Q Q _ D D Q Q _ CLK P R C L CLK P R C L Note: Open-drain is not shown in the figure.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 30 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) PCRD M U X IOD 0 1 PDRD P50 ~ P57 PCWR D Q Q _ CLK P R C L PDWR D Q Q _ CLK P R C L P R C L CLK DQ Q _ TI n POR T Note: Pull-hi gh (down) is not shown in the figure.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 31 (This specificatio n is subject to change without f urther notice) 6.4.1 Usage of Port 5 Inp ut Cha nge Wa ke- up/Interr upt Func tion (1) Wake-up (2) Wake-up and Interrupt (a) Before Sleep (a) Before Sleep 1.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 32 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) All I/O port pins are configured .
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 33 (This specificatio n is subject to change without f urther notice) Case [c] If Comparator output st atus change is used to wake-up the EM78P259N/ 260N and CMPWE bit of the RE register is enabled before SLEP , WDT must be disabled by software.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 34 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 6.5.1.1 W ake-Up and Interrupt Modes Operation Summary All categories under Wake-up and Interru pt modes are summarized below.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 35 (This specificatio n is subject to change without f urther notice) Signal Sleep Mode Norma l Mo de RE (CMPWE) Bit2=0, IOCE0 (CMPIE) Bit4=0 IOCF0 (CMPIE) Bit4=0 Comparator output st atus changed wake-up is inv alid.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 36 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 6.5. 1.2 Reg ister Ini tial V al ues after Re set The following summarizes the init ialized valu es for registers.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 37 (This specificatio n is subject to change without f urther notice) Address Name Reset Type Bit 7 .
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 38 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Address Name Reset Type Bit 7 Bit 6 B.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 39 (This specificatio n is subject to change without f urther notice) Address Name Reset Type Bit 7 .
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 40 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Address Na me Reset Type Bit 7 Bit 6 .
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 41 (This specificatio n is subject to change without f urther notice) 6.5.2 The T and P Status under STATUS (R3) R egister A reset condition is initiated by one of the following events : 1.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 42 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) The ex tern al int erru pt has an on- chip d igit al nois e rej ecti on ci rcuit . Input puls e less than 8 system clock tim e is eliminated as noise.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 43 (This specificatio n is subject to change without f urther notice) INT ENI/DISI IOD RFWR IOCFRD IOCFW R IRQ n IRQ m RFRD IOC F /RES ET /IRQ n VCC RF CLK CLK Q Q D P R L C _ P R L C Q Q _ D Fig.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 44 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 6.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 45 (This specificatio n is subject to change without f urther notice) Bit 1 (ADE1): AD converter ena.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 46 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Bit 4 (ADRUN): ADC starts to RUN. 0 = res et on compl etio n of the c onve rsion. This bit cannot be rese t though so ftware.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 47 (This specificatio n is subject to change without f urther notice) 6.7.2 ADC Data Register (ADDATA/RB, ADDATA1H/RC, ADDATA1L/RD) When the AD conversion is completed, the result is load ed to the ADDA T A, ADDA T A1H and ADDA T A1L registers.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 48 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 3. ADWE bit of the RE register is set to “1.” Wake-up from ADC conversion (where it remains in operation during sleep mode).
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 49 (This specificatio n is subject to change without f urther notice) NOTE In order to obtain accurat e values, it is necessary to av oid any data tr ansition on th e I/O pins dur ing AD conversion .
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 50 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) RETI INITIAL: MOV A,@0B00000001 ; To .
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 51 (This specificatio n is subject to change without f urther notice) 6.8 Infrared Remote Contr ol Application/PWM W aveform Generation 6.8.1 Overview This LSI can easily output infrared carr i er or PWM standard waveform.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 52 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) When an interrupt is generated by the.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 53 (This specificatio n is subject to change without f urther notice) The following figure shows LGP=0 an d HF= 1 . The IR OUT waveform modu lates the Fcarrier waveform at low time segments of the pu lse.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 54 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) The following figure show s LGP=1 and HF=1 . When this bit is set to high level, t he high time segment of the pulse is ignored.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 55 (This specificatio n is subject to change without f urther notice).
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 56 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 6.9 Timer/Counter 6.9.1 Overview Timer A (TCCA) is an 8-bit clock counter. Timer B (TCCB) is a 16-bit clock counter.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 57 (This specificatio n is subject to change without f urther notice) Under TCCBH / MSB Counter (IOC71): TCCBH /MSB (I OC71) is an 8-bi t cl ock count er is for the most si gnifi cant byte of TCCBX (TCCBH).
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 58 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 6.9.3 Programming the Related Registers When defining TCCX, refer to it s related registers operation as shown in the tables below .
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 59 (This specificatio n is subject to change without f urther notice) 6.10.1 External Reference Signal The analog signal that is presented at Cin– compares to the signal at Cin+.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 60 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 6.10.3 Using a Comparator as an Operation Amplifier The comparator can be us ed as an operation amplifier if a feedback resistor is externally connected from the input to the output.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 61 (This specificatio n is subject to change without f urther notice) 6.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 62 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 6.11.2 Crystal Oscillator/Ceramic Resonators (Crystal) The EM 78P2 59N/ 260N c an be dri ven by an ext ern al cl ock s ignal t hro ugh the O SCI pin as illustrated below .
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 63 (This specificatio n is subject to change without f urther notice) Circuit diagrams for serial and parallel modes Crysta l/Resonator : OSCI EM 78P259N EM 78P260N C 7404 330 330 Crysta l 7404 7404 Fig.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 64 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Based on the above reasons, it must b.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 65 (This specificatio n is subject to change without f urther notice) 6.12 Pow er- on Considerations Any microcontroller is not warranted to sta rt operating properly before the power supply stabilizes in its steady state.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 66 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 6.12.3 Residual Voltage Protection When the battery is replaced, device power (Vdd) is remo ve d but the residual voltage remains.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 67 (This specificatio n is subject to change without f urther notice) 6.13 Code Option EM78P259N/260N has two Code option words and one Customer ID word that are not part of the normal pr ogram memory .
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 68 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Bit 3 (HLP): Pow er consumption selec.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 69 (This specificatio n is subject to change without f urther notice) Bit 7 (WDTPS) : WDT Time -out Period Selection bit WDT Time Watchdo g Tim e * 1 18 ms 0 4.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 70 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) Convention: R = Register design ator that specifies which on e of the registers (including operation and general purpose registers) is to be utilized b y the instruction.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 71 (This specificatio n is subject to change without f urther notice) Instruction B inary HEX Mnemon.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 72 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 8 DC Electrical Characteristics T a=25 ° C, V DD=5.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 73 (This specificatio n is subject to change without f urther notice) Symbol Param eter Condition Mi.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 74 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) 8.1 AD Conv erter Characteristics Vdd= 2.5V t o 5.5V , Vss =0V, T a=25 ° C Symbol Parameter Condition Min.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 75 (This specificatio n is subject to change without f urther notice) 8.2 Comparator (OP) Characteristics Vdd = 5.0V , Vss=0V , T a=25 ° C Symbol Parameter C ondition Min.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 76 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) I RC OS C Fr eque nc y ( V D D = 5 V ) 0 1 2 3 4 5 6 7 8 9 10 - 4 0 - 2 0 0 2 55 07 08 5 T em p er at u r e ( ℃ ) Fr e que ncy ( M H z) Fig.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 77 (This specificatio n is subject to change without f urther notice) 10 Timing Diagrams RESET Timin.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 78 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) APPENDIX A Package Type OTP MCU Packa.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 79 (This specificatio n is subject to change without f urther notice) B.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 80 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) B.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 81 (This specificatio n is subject to change without f urther notice) B.
EM78P259N/260N 8-Bit Microprocessor with OTP ROM 82 • Product Specification (V1.2 ) 05.18.2007 (This specification is sub ject to change without further notice) B.
EM78P259N/260N 8-Bi t Micr oproce ssor w ith OTP RO M Product Specificat ion (V1.2) 05.1 8.2007 • 83 (This specificatio n is subject to change without f urther notice) C Quality Assurance and Reliab.
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